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OMAP3503 Datasheet(PDF) 13 Page - Texas Instruments |
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OMAP3503 Datasheet(HTML) 13 Page - Texas Instruments |
13 / 227 page www.ti.com OMAP3515/03 Applications Processor SPRS505 – FEBRUARY 2008 Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued) BALL BALL PIN MODE TYPE BALL BALL RESET POWER [9] HYS BUFFER PULL IO BOTTOM TOP NAME [3] [4] [5] RESET RESET REL. [10] STRENGTH U/D CELL [13] [1] [2] STATE REL. MODE (mA) [11] TYPE [6] STATE [8] [12] [7] H15 K23 sdrc_nwe 0 O 1 1 0 VDDS_ MEM No 4 NA LVCMOS B7 C1 sdrc_dm0 0 O 0 0 0 VDDS_ MEM No 4 NA LVCMOS A16 A17 sdrc_dm1 0 O 0 0 0 VDDS_ MEM No 4 NA LVCMOS B11 A6 sdrc_dm2 0 O 0 0 0 VDDS_ MEM No 4 NA LVCMOS C20 A20 sdrc_dm3 0 O 0 0 0 VDDS_ MEM No 4 NA LVCMOS A6 C2 sdrc_dqs0 0 IO L Z 0 VDDS_ MEM Yes 4 PU/ LVCMOS PD A17 B17 sdrc_dqs1 0 IO L Z 0 VDDS_ MEM Yes 4 PU/ LVCMOS PD A10 B6 sdrc_dqs2 0 IO L Z 0 VDDS_ MEM Yes 4 PU/ LVCMOS PD A20 B20 sdrc_dqs3 0 IO L Z 0 VDDS_ MEM Yes 4 PU/ LVCMOS PD N4 AC15 gpmc_a1 0 O L L 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD gpio_34 4 IO safe_mode 7 M4 AB15 gpmc_a2 0 O L L 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD gpio_35 4 IO safe_mode 7 L4 AC16 gpmc_a3 0 O L L 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD gpio_36 4 IO safe_mode 7 K4 AB16 gpmc_a4 0 O L L 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD gpio_37 4 IO safe_mode 7 T3 AC17 gpmc_a5 0 O L L 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD gpio_38 4 IO safe_mode 7 R3 AB17 gpmc_a6 0 O H H 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD gpio_39 4 IO safe_mode 7 N3 AC18 gpmc_a7 0 O H H 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD gpio_40 4 IO safe_mode 7 M3 AB18 gpmc_a8 0 O H H 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD gpio_41 4 IO safe_mode 7 L3 AC19 gpmc_a9 0 O H H 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD sys_ 1 I ndmareq2 gpio_42 4 IO safe_mode 7 K3 AB19 gpmc_a10 0 O H H 7 VDDS_ MEM Yes 4 PU/ LVCMOS PD sys_ 1 I ndmareq3 gpio_43 4 IO Submit Documentation Feedback TERMINAL DESCRIPTION 13 |
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