M25P80 datasheet(6/35 Pages) STMICROELECTRONICS

Part #	M25P80

Description	8 Mbit, Low Voltage, Serial Flash Memory With 25 MHz SPI Bus Interface

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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M25P80

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SIGNAL DESCRIPTION

Serial Data Output (Q). This

output

signal is

used to transfer data serially out of the device.

Data is shifted out on the falling edge of Serial

Clock (C).

Serial Data Input (D). This input signal is used to

transfer data serially into the device. It receives in-

structions, addresses, and the data to be pro-

grammed. Values are latched on the rising edge of

Serial Clock (C).

Serial Clock (C). This input signal provides the

timing of the serial interface. Instructions, address-

es, or data present at Serial Data Input (D) are

latched on the rising edge of Serial Clock (C). Data

on Serial Data Output (Q) changes after the falling

edge of Serial Clock (C).

Chip Select (S). When this input signal is High,

the device is deselected and Serial Data Output

(Q) is at high impedance. Unless an internal Pro-

gram, Erase or Write Status Register cycle is in

progress, the device will be in the Standby mode

(this is not the Deep Power-down mode). Driving

Chip Select (S) Low enables the device, placing it

in the active power mode.

After Power-up, a falling edge on Chip Select (S)

is required prior to the start of any instruction.

Hold (HOLD). The Hold (HOLD) signal is used to

pause any serial communications with the device

without deselecting the device.

During the Hold condition, the Serial Data Output

(Q) is high impedance, and Serial Data Input (D)

and Serial Clock (C) are Don’t Care.

To start the Hold condition, the device must be se-

lected, with Chip Select (S) driven Low.

Write Protect (W). The main purpose of this in-

put signal is to freeze the size of the area of mem-

ory that is protected against program or erase

instructions (as specified by the values in the BP2,

BP1 and BP0 bits of the Status Register).

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