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M58WR016QT Datasheet(PDF) 28 Page - Numonyx B.V

Part # M58WR016QT
Description  16 Mbit and 32 Mbit (x16, Multiple Bank, Burst) 1.8V supply Flash memories
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M58WR016QT Datasheet(HTML) 28 Page - Numonyx B.V

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Command interface - factory program commands
M58WR016QT, M58WR016QB, M58WR032QT,
28/110
6
Command interface - factory program commands
The Factory Program commands are used to speed up programming. They require VPP to
be at VPPH except for the Bank Erase command which also operates at VPP = VDD. Refer to
Table 8: Factory Program commands, in conjunction with the following text descriptions.
The use of Factory Program commands requires certain operating conditions.
VPP must be set to VPPH (except for Bank Erase comand),
VDD must be within operating range,
Ambient temperature, TA must be 25°C ± 5°C,
The targeted block must be unlocked.
6.1
Bank Erase command
The Bank Erase command can be used to erase a bank. It sets all the bits within the
selected bank to ’1’. All previous data in the bank is lost. The Bank Erase command will
ignore any protected blocks within the bank. If all blocks in the bank are protected then the
Bank Erase operation will abort and the data in the bank will not be changed. The Status
Register will not output any error.
Bank Erase operations can be performed at both VPP = VPPH and VPP = VDD.
Two Bus Write cycles are required to issue the command.
The first bus cycle sets up the Bank Erase command.
The second latches the bank address in the internal state machine and starts the
Program/Erase Controller.
If the second bus cycle is not Write Bank Erase Confirm (D0h), Status Register bits SR4 and
SR5 are set and the command aborts. Erase aborts if Reset turns to VIL. As data integrity
cannot be guaranteed when the Erase operation is aborted, the bank must be erased again.
Once the command is issued the device outputs the Status Register data when any address
within the bank is read. At the end of the operation the bank will remain in Read Status
Register mode until a Read Array, Read CFI Query or Read Electronic Signature command
is issued.
During Bank Erase operations the bank being erased will only accept the Read Array, Read
Status Register, Read Electronic Signature and Read CFI Query command, all other
commands will be ignored.
For optimum performance, Bank Erase commands should be limited to a maximum of 100
Program/Erase cycles per Block. After 100 Program/Erase cycles the internal algorithm will
still operate properly but some degradation in performance may occur.
Dual Operations are not supported during Bank Erase operations and the command cannot
be suspended.
Typical Erase times are given in Table 15: Program/Erase times and endurance cycles.


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