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M58WR064HU Datasheet(PDF) 8 Page - Numonyx B.V

Part # M58WR064HU
Description  64 Mbit (4Mb x16, Mux I/O, Multiple Bank, Burst) 1.8V supply Flash memories
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M58WR064HU Datasheet(HTML) 8 Page - Numonyx B.V

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Summary description
M58WR064HU M58WR064HL
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1
Summary description
The M58WR064HU/L are 64 Mbit (4 Mbit x16) non-volatile Flash memories. They may be
erased electrically at block level and programmed in-system on a Word-by-Word basis using
a 1.7V to 2V VDD supply for the circuitry and a 1.7V to 2V VDDQ supply for the Input/Output
pins. An optional 12V (9V tolerant) VPP power supply is provided to speed up customer
programming.
The first sixteen address lines are multiplexed with the Data Input/Output signals on the
multiplexed address/data bus ADQ0-ADQ15. The remaining address lines A16-A21 are the
Most Significant Bit addresses.
The device features an asymmetrical block architecture.
The M58WR064HU and M58WR064HL have an array of 135 blocks, and are divided into 4
Mbit banks. There are 15 banks each containing 8 main blocks of 32 KWords, and one
parameter bank containing 8 parameter blocks of 4 KWords and 7 main blocks of 32
KWords.
The Multiple Bank Architecture allows Dual Operations, while programming or erasing in
one bank, Read operations are possible in other banks. Only one bank at a time is allowed
to be in Program or Erase mode. It is possible to perform burst reads that cross bank
boundaries. The bank architecture is summarized in Table 2, and the memory maps are
shown in Figure 3 The Parameter Blocks are located at the top of the memory address
space for the M58WR064HU, and at the bottom for the M58WR064HL.
Each block can be erased separately. Erase can be suspended, in order to perform program
in any other block, and then resumed. Program can be suspended to read data in any other
block and then resumed. Each block can be programmed and erased over 100,000 cycles
using the supply voltage VDD. There are two Enhanced Factory programming commands
available to speed up programming.
Program and Erase commands are written to the Command Interface of the memory. An
internal Program/Erase Controller takes care of the timings necessary for program and
erase operations. The end of a program or erase operation can be detected and any error
conditions identified in the Status Register. The command set required to control the
memory is consistent with JEDEC standards.
The device supports synchronous burst read and asynchronous read from all blocks of the
memory array; at power-up the device is configured for asynchronous read. In synchronous
burst mode, data is output on each clock cycle at frequencies of up to 66MHz. The
synchronous burst read operation can be suspended and resumed.
The device features an Automatic Standby mode. When the bus is inactive during
Asynchronous Read operations, the device automatically switches to the Automatic Standby
mode. In this condition the power consumption is reduced to the standby value IDD4 and the
outputs are still driven.
The M58WR064HU/L feature an instant, individual block locking scheme that allows any
block to be locked or unlocked with no latency, enabling instant code and data protection. All
blocks have three levels of protection. They can be locked and locked-down individually
preventing any accidental programming or erasure. There is an additional hardware
protection against program and erase. When VPP ≤VPPLK all blocks are protected against
program or erase. All blocks are locked at Power- Up.


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