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MFRC522 Datasheet(PDF) 47 Page - NXP Semiconductors

Part No. MFRC522
Description  Contactless Reader IC
Download  109 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFRC522 Datasheet(HTML) 47 Page - NXP Semiconductors

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© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 3.2 — 22 May 2007
47 of 109
NXP Semiconductors
MFRC522
Contactless Reader IC
10.2.1 General
An interface compatible to an SPI interface enables a high-speed serial communication
between the MFRC522 and a
μ-Controller for the communication. The implemented SPI
compatible interface is according to a standard SPI interface.
For timing specification refer to Section 23.8 “Timing for the SPI compatible interface”.
The MFRC522 acts as a slave during the SPI communication. The SPI clock SCK has to
be generated by the master. Data communication from the master to the slave uses the
Line MOSI. Line MISO is used to send data back from the MFRC522 to the master.
On both lines (MOSI, MISO) each data byte is sent by MSB first. Data on MOSI line
should be stable on rising edge of the clock line and can changed on falling edge. The
same is valid for the MISO line. Data is provided by the MFRC522 on falling edge and is
stable during rising edge.
10.2.2 Read data
To read out data using the SPI compatible interface the following byte order has to be
used. It is possible to read out up to n-data bytes.
The first sent byte defines both, the mode itself and the address byte.
Remark: The most significant bit (MSB) has to be send first.
Fig 7.
Connection to host with SPI
SCK
MOSI
MISO
NSS
RC522
SCK
MOSI
MISO
NSS
Table 136: Byte Order for MOSI and MISO
byte 0
byte 1
byte 2
to
byte n
byte n+1
MOSI
adr 0
adr 1
adr 2
……..
adr n
00
MISO
X
data 0
data 1
……..
data n-1
data n


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