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M95256 Datasheet(PDF) 30 Page - STMicroelectronics |
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M95256 Datasheet(HTML) 30 Page - STMicroelectronics |
30 / 43 page DC and AC parameters M95256, M95256-W, M95256-R 30/43 Table 16. AC characteristics (M95256, device grade 3) Test conditions specified in Table 10 and Table 7 Symbol Alt. Parameter Min. Max. Unit fC fSCK Clock frequency D.C. 5 MHz tSLCH tCSS1 S active setup time 90 ns tSHCH tCSS2 S not active setup time 90 ns tSHSL tCS S deselect time 100 ns tCHSH tCSH S active hold time 90 ns tCHSL S not active hold time 90 ns tCH (1) 1. tCH + tCL must never be less than the shortest possible clock period, 1 / fC(max) tCLH Clock high time 90 ns tCL (1) tCLL Clock low time 90 ns tCLCH (2) 2. Value guaranteed by characterization, not 100% tested in production. tRC Clock rise time 1 µs tCHCL (2) tFC Clock fall time 1 µs tDVCH tDSU Data in setup time 20 ns tCHDX tDH Data in hold time 30 ns tHHCH Clock low hold time after HOLD not active 70 ns tHLCH Clock low hold time after HOLD active 40 ns tCLHL Clock low setup time before HOLD active 0 ns tCLHH Clock low setup time before HOLD not active 0 ns tSHQZ (2) tDIS Output disable time 100 ns tCLQV tV Clock low to output valid 60 ns tCLQX tHO Output hold time 0 ns tQLQH (2) tRO Output rise time 50 ns tQHQL (2) tFO Output fall time 50 ns tHHQV tLZ HOLD high to output valid 50 ns tHLQZ (2) tHZ HOLD low to output High-Z 100 ns tW tWC Write time 5 ms |
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