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M29DW641F Datasheet(PDF) 26 Page - Numonyx B.V |
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M29DW641F Datasheet(HTML) 26 Page - Numonyx B.V |
26 / 80 page Command interface M29DW641F 26/80 6.1.3 Read CFI Query command The Read CFI Query command is used to put the addressed bank in Read CFI Query mode. Once in Read CFI Query mode, Bus Read Operations to the same bank will output data from the Common Flash Interface (CFI) Memory Area. If the Read Operations are to a different bank from the one specified in the command then the Read Operations will output the contents of the memory array and not the CFI data. One Bus Write cycle is required to issue the Read CFI Query command. Care must be taken to issue the command to one of the banks (A21-A19) along with the address shown in Table 3 Once the command is issued subsequent Bus Read Operations in the same bank (A21-A19) to the addresses shown in Appendix B (A7-A0), will read from the Common Flash Interface Memory Area. This command is valid only when the device is in the Read Array or Auto Select mode. To enter Read CFI query mode from Auto Select mode, the Read CFI Query command must be issued to the same bank address as the Auto Select command, otherwise the device will not enter Read CFI Query mode. The Read/Reset command must be issued to return the device to the previous mode (the Read Array mode or Auto Select mode). A second Read/Reset command is required to put the device in Read Array mode from Auto Select mode. See Appendix B, Table 29, Table 30, Table 31, Table 32, Table 33 and Table 34 for details on the information contained in the Common Flash Interface (CFI) memory area. 6.1.4 Chip Erase command The Chip Erase command can be used to erase the entire chip. Six Bus Write Operations are required to issue the Chip Erase command and start the Program/Erase Controller. If any blocks are protected, then these are ignored and all the other blocks are erased. If all of the blocks are protected the Chip Erase Operation appears to start but will terminate within about 100µs, leaving the data unchanged. No error condition is given when protected blocks are ignored. During the Erase Operation the memory will ignore all commands, including the Erase Suspend command. It is not possible to issue any command to abort the operation. Typical chip erase times are given in Table 12. All Bus Read Operations during the Chip Erase Operation will output the Status Register on the Data Inputs/Outputs. See the section on the Status Register for more details. After the Chip Erase Operation has completed the memory will return to the Read mode, unless an error has occurred. When an error occurs the memory will continue to output the Status Register. A Read/Reset command must be issued to reset the error condition and return to Read mode. The Chip Erase command sets all of the bits in unprotected blocks of the memory to ’1’. All previous data is lost. |
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