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M25PE80 Datasheet(PDF) 37 Page - Numonyx B.V |
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M25PE80 Datasheet(HTML) 37 Page - Numonyx B.V |
37 / 66 page M25PE80 Instructions 37/66 6.11 Write to lock register (WRLR) The write to lock register (WRLR) instruction allows bits to be changed in the lock registers. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the write enable (WREN) instruction has been decoded, the device sets the write enable latch (WEL). The write to lock register (WRLR) instruction is entered by driving Chip Select (S) Low, followed by the instruction code, three address bytes (pointing to any address in the targeted sector and one data byte on serial data input (D). The instruction sequence is shown in Figure 17. Chip Select (S) must be driven High after the eighth bit of the data byte has been latched in, otherwise the write to lock register (WRLR) instruction is not executed. Lock register bits are volatile, and therefore do not require time to be written. When the write to lock register (WRLR) instruction has been successfully executed, the write enable latch (WEL) bit is reset after a delay time less than tSHSL minimum value. Any write to lock register (WRLR) instruction, while an erase, program or write cycle is in progress, is rejected without having any effects on the cycle that is in progress. Figure 17. Write to lock register (WRLR) instruction sequence Table 12. Lock register in(1) 1. The table rows in gray are true for products processed in the T7Y process only (see Important note on page 6). Sector Bit Value All sectors in T9HX process All sectors except for sector 0 and sector 15 in T7Y process b7-b2 ‘0’ b1 Sector lock down bit value (refer to Table 11) b0 Sector write lock bit value (refer to Table 11) AI10784 C D S 23 2 1 3456789 10 28 29 30 31 32 33 34 35 22 21 3210 36 37 38 Instruction 24-bit address 0 765432 0 1 Lock register in 39 MSB MSB |
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