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SN65HVD1781DR Datasheet(PDF) 7 Page - Texas Instruments |
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SN65HVD1781DR Datasheet(HTML) 7 Page - Texas Instruments |
7 / 16 page www.ti.com THERMAL INFORMATION PARAMETER MEASUREMENT INFORMATION 60 1% W ± V OD 0Vor3V _ + –7V<V(test)<12V DE V CC A B D 375 1% W ± 375 1% W ± S0301-02 SN65HVD1781 SLLS877A – DECEMBER 2007 – REVISED JANUARY 2008 PARAMETER TEST CONDITIONS VALUE UNIT JEDEC high-K model 138 SOIC-8 JEDIC low-K model 242 JEDEC high-K model 59 RθJA Junction-to-ambient thermal resistance (no airflow) DIP-8 °C/W JEDIC low-K model 128 JEDEC high-K model 95 SOIC-14 JEDIC low-K model 168 SOIC-8 62 RθJB Junction-to-board thermal resistance DIP-8 39 °C/W SOIC-14 40 SOIC-8 61 RθJC Junction-to-case thermal resistamce DIP-8 61 °C/W SOIC-14 44 VCC = 3.6V, TJ = 150°C, RL = 300 Ω, CL = 50 pF (driver), CL = 15 pF (receiver) 75 3.3-V supply, unterminated(1) VCC = 3.6V, TJ = 150°C, RL = 100 Ω, CL = 50 pF (driver), CL = 15 pF (receiver) 95 3.3-V supply, RS-422 load(1) VCC = 3.6V, TJ = 150°C, RL = 54 Ω, CL = 50 pF (driver), CL = 15 pF (receiver) 115 3.3-V supply, RS-485 load(1) PD Power dissipation mW VCC = 5.5V, TJ = 150°C, RL = 300 Ω, CL = 50 pF (driver), CL = 15 pF (receiver) 290 5-V supply, unterminated(1) VCC = 5.5V, TJ = 150°C, RL = 100 Ω, CL = 50 pF (driver), CL = 15 pF (receiver) 320 5-V supply, RS-422 load(1) VCC = 5.5V, TJ = 150°C, RL = 54 Ω, CL = 50 pF (driver), CL = 15 pF (receiver) 400 5-V supply, RS-485 load(1) TSD Thermal-shutdown junction temperature 170 °C (1) Driver and receiver enabled, 50% duty cycle square-wave signal at signaling rate: 1 Mbps. Input generator rate is 100 kbps, 50% duty cycle, rise and fall times less than 6 nsec, output impedance 50 Ω. Figure 1. Measurement of Driver Differential Output Voltage With Common-Mode Load Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): SN65HVD1781 |
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