2 / 25 page
CYDM256A16, CYDM128A16,
CYDM064A16, CYDM128A08,
CYDM064A08
Document #: 38-06081 Rev. *F
Page 2 of 25
Notes:
1. A0–A11 for 4K devices; A0–A12 for 8K devices; A0–A13 for 16K devices.
2. BUSY is an output in master mode and an input in slave mode.
IO
Control
Address Decode
Mailboxes
INT
L
INT
R
Address Decode
16K X 16
Dual Ported Array
IO
Control
Interrupt
Arbitration
Semaphore
A [13:0]
R
CE
R
BUSY
R
I/O[15:0]
R
LB
R
I/O[15:0]
L
LB
L
OE
L
BUSY
L
A[13:0]
L
R/W
L
CE
L
M/S
UB
L
UB
R
SEM
L
SEM
R
Input Read
Register and
Output Drive
Register
CE
R
OE
R
OE
R
R/W
R
R/W
R
ODR
0 - ODR4
CE
L
OE
L
R/W
L
IRR
0 ,IRR1
SFEN
Figure 1. Top Level Block Diagram[1,2]