CY28341OC-3 datasheet(1/19 Pages) CYPRESS

Part #	CY28341OC-3

Description	Universal Clock Chip for VIA?줡4M/KT/KM400A DDR Systems

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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PRELIMINARY

Universal Clock Chip for VIA™P4M/KT/KM400A DDR Systems

CY28341-3

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

, CA 95134

•

408-943-2600

Document #: 38-07580 Rev. **

Revised October 3, 2003

Features

• Supports VIA P4M/KM/KT/266/333/400A chipsets

• Supports Intel Pentium 4, Athlon™ processors

• Supports two DDR DIMMS

• Provides:

— Two different programmable CPU clock pairs

— Six differential DDR pairs

— Three low-skew/-jitter AGP clocks

— Seven low-skew/-jitter PCI clocks

— One 48M output for USB

— One programmable 24M or 48M for SIO

• Dial-A-Frequency and Dial-A-dB

 features

• Spread Spectrum for best EMI reduction

• Watchdog feature for system recovery

• SMBus-compatible for programmability

• 56-pin SSOP and TSSOP packages

Note:

1. Pins marked with [*] have internal 250 K

Ω pull-up resistors. Pins marked with [**] have internal 250 KΩ pull-down resistors.

Table 1. Frequency Selection Table

FS(3:0)

CPU

AGP

PCI

0000

100.9

67.3

33.6

0001

100.0

66.7

33.3

0010

133.9

66.9

33.5

0011

133.3

66.7

33.3

0100

110.0

73.3

36.7

0101

145.2

72.6

36.3

0110

180.0

72.0

36.0

0111

198.4

71.7

35.8

1000

200.9

66.9

33.5

1001

200.0

66.7

33.3

1010

166.9

66.8

33.4

1011

166.6

66.6

33.3

1100

100.0

66.7

33.3

1101

133.3

66.7

33.3

1110

200.0

66.7

33.3

1111

166.6

66.6

33.3

Block Diagram

Pin Configuration[1]

PLL1

S2D

CONVERT

SMBus

WD

CPUCS_T/C

VDDC

VDDI

CPU(0:1)/CPU0D_T/C

SELP4_K7#

PCI(3:6)

PCI_F

FS1

REF(0:1)

VDDR

FS0

48M

24_48M

FBOUT

DDRT(0:5)

SCLK

SDATA

PD#

AGP(0:2)

VDDAGP

VDD48M

VDDD

XTAL

XOUT

XIN

FS2

PCI2

PCI1

VDDPCI

PLL2

SRESET#

/2

Buf_IN

REF0

FS3

MULTSEL

DDRC(0:5)

WDEN

56 pin SSOP

VSSR

*FS0/REF0

XIN

XOUT

VDDAGP

AGP0

*SELP4_K7/AGP1

VSSAGP

AGP2

PCI1

*MULTSEL/PCI2

VSSPCI

PCI3

PCI4

VDDPCI

PCI5

PCI6

VSS48M

**FS3/48M

**FS2/24_48M

VDD48M

VDD

VSS

IREF

*PD#/SRESET#

SCLK

SDATA

**FS1/PCI_F

VDDR

VTTPWRGD#/REF1

VSSC

CPUT/CPUOD_T

CPUC/CPUOD_C

VDDC

VDDI

CPUCS_T

CPUCS_C

FBOUT

BUF_IN

DDRT0

DDRC0

DDRT1

DDRC1

VDDD

VSSD

DDRT2

DDRC2

DDRT3

DDRC3

VDDD

VSSD

DDRT4

DDRC4

DDRT5

DDRC5

VSSI

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7

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