CY25811/12/14
Document Number: 38-07112 Rev. *F
Page 2 of 12
Pinouts
Figure 1. Pin Diagram - 8 Pin SOIC/TSSOP
Table 1. Pin Definition - 8 Pin SOIC/TSSOP
Functional Description
The CY25811/12/14 products are Spread Spectrum Clock
Generator (SSCG) ICs used for the purpose of reducing electro-
magnetic interference (EMI) found in today’s high speed digital
electronic systems.
The devices use a Cypress proprietary phase-locked loop (PLL)
and Spread Spectrum Clock (SSC) technology to synthesize and
modulate the frequency of the input clock. By frequency
modulating the clock, the measured EMI at the fundamental and
harmonic frequencies is greatly reduced.
This reduction in radiated energy can significantly reduce the
cost of complying with regulatory agency requirements and
improve time to market without degrading system performance.
The input frequency range is 4 to 32 MHz and accepts clock,
crystal and ceramic resonator inputs. The output clock can be
selected to produce 1x, 2x, or 4x multiplication of the input
frequency with Spread Spectrum Frequency Modulation.
The use of 2x or 4x frequency multiplication eliminates the need
for higher order crystals and enables the user to generate up to
128 MHz Spread Spectrum Clock (SSC) by using only first order
crystals. This reduces the cost while improving the system clock
accuracy, performance and complexity.
Center Spread or Down Spread frequency modulation can be
selected by the user based on four discrete values of Spread %
for each Spread mode with the option of a Non Spread mode for
system test and verification purposes.
The CY25811/12/14 products are available in an 8 pin SOIC (150
mil.) package with a commercial operating temperature range of
0 to 70
°C and Industrial Temperature range of –40 to 85°C. Refer
to CY25568 for multiple clock output options such as modulated
and unmodulated clock outputs or Power-down function. For
Automotive applications, refer to CY25811/12/14SE data sheets.
Input Frequency Range and Selection
The CY25811/12/14 input frequency range is 4 to 32 MHz. This
range is divided into three segments and controlled by a 3-Level
FRSEL pin as given in Table 2.
1
2
3
4
8
7
6
5
XIN/CLKIN
VSS
S1
S0
XOUT
VDD
FRSEL
SSCLK
CY25811
CY25812
CY25814
Pin No.
Name
Type
Description
1Xin/CLK
Crystal, ceramic resonator or clock input pin
2VSS
Power supply ground.
3S1
Digital Spread% control pin. 3-Level input (H-M-L). Default = M.
4S0
Digital Spread% control pin. 3-Level input (H-M-L). Default = M.
5
SSCLK
Spread Spectrum output clock.
6
FRSEL
Input frequency range selection digital control input. 3-Level input (H-M-L). Default = M.
7VDD
Positive power supply.
8XOUT
Crystal or ceramic resonator output pin.
Table 2. Input Frequency Selection
FRSEL
Input Frequency Range
0
4.0 to 8.0 MHz
1
8.0 to 16.0 MHz
M
16.0 to 32.0 MHz
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