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CY8C20140-LDX2I Datasheet(PDF) 7 Page - Cypress Semiconductor

Part # CY8C20140-LDX2I
Description  CapSense Express??- 4 Configurable IOs
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY8C20140-LDX2I Datasheet(HTML) 7 Page - Cypress Semiconductor

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CY8C20140
Document Number: 001-17348 Rev. *C
Page 7 of 13
CIN
Capacitive load on pins as input
0.5
1.7
5
pF
Package and pin dependent.
Temp = 25°C
COUT
Capacitive load on pins as output
0.5
1.7
5
pF
Package and pin dependent.
Temp = 25°C
5V and 3.3V DC General Purpose IO Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges:4.75V to 5.25V
and -40C<TA<85C, 3.0V to 3.6V -40°C<TA<85°C. Typical parameters apply to 5v and 3V at 25°C and are for design guidance only.
Parameter
Description
Min
Typ
Max
Unit
Notes
2.7V DC General Purpose IO Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges:2.4V to 3.0V and
-40°C<TA<85°C, respectively. Typical parameters apply to 2.7V at 25°C and are for design guidance only.
Parameter
Description
Min
Typ
Max
Unit
Notes
RPU
Pull up resistor
4
5.6
8
k
Ω
VOH1
High output voltage
Port 0 pins
VDD – 0.2
V
IOH < 10 µA, maximum of 10 mA
source current in all IOs.
VOH2
High output voltage
Port 0 pins
VDD – 0.5
V
IOH = 0.2 mA, maximum of 10 mA
source current in all IOs.
VOH3
High output voltage
Port 1 pins
VDD – 0.2
V
IOH < 10 µA, maximum of 10 mA
source current in all IOs.
VOH4
High output voltage
Port 1 pins
VDD – 0.5
V
IOH = 2 mA, maximum of 10 mA source
current in all IOs.
VOL
Low output voltage
0.75
V
IOL = 10 mA, maximum of 30 mA sink
current on even port pins (for example,
P0[2] and P1[4]) and 30 mA sink
current on odd port pins (for example,
P0[3] and P1[3]).
VOLP1
Low output voltage port 1 pins
0.4
V
IOL=5mA Maximum of 50mA sink
current on even port pins (for example,
P0[2] and P1[4]) and 50mA sink current
on odd port pins (for example, P0[1]
and P1[3]). 2.4<=VDD<=3.6V
VIL
Input low voltage
0.75
V
VDD= 3.0 to 3.6V
VIH
Input high voltage
1.6
V
VDD= 3.0 to 3.6V
VIL
Input low voltage
0.75
V
VDD = 2.4 to 3.6V.
VIH1
Input high voltage
1.4
V
VDD = 2.4 to 2.7V.
VIH2
Input high voltage
1.6
V
VDD = 2.7 to 3.6V
VH
Input hysteresis voltage
60
mV
IIL
Input leakage
1
nA
Gross tested to 1 µA.
CIN
Capacitive load on pins as input
0.5
1.7
5
pF
Package and pin dependent.
Temp = 25°C.
COUT
Capacitive load on pins as output
0.5
1.7
5
pF
Package and pin dependent.
Temp = 25°C.
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