CY7C63001C
CY7C63101C
Document #: 38-08026 Rev. *B
Page 10 of 28
To configure a GPIO pin as an input, a “1” should be written to
the Port Data Register bit associated with that pin to disable
the pull-down function of the Isink DAC (see Figure 6-9).When
the Port Data Register is read, the bit value is a “1” if the
voltage on the pin is greater than the Schmitt trigger threshold,
or “0” if it is below the threshold. In applications where an
internal pull-up is required, the Rup pull-up resistor can be
engaged by writing a “0” to the appropriate bit in the Port
Pull-up Register.
Both Port 0 and Port 1 Pull-up Registers are write only (see
Figures 6-10 and 6-11). The Port 0 Pull-up Register is located
at I/O address 0x08 and Port 1 Pull-up Register is mapped to
address 0x09. The contents of the Port Pull-up Registers are
cleared during reset, allowing the outputs to be controlled by
the state of the Data Registers. The Port Pull-up Registers also
select the polarity of transition that generates a GPIO interrupt.
A “0” selects a HIGH to LOW transition while a “1” selects a
LOW to HIGH transition.
Writing a “0” to the Data Register drives the output LOW.
Instead of providing a fixed output drive, the USB Controller
allows the user to select an output sink current level for each
I/O pin. The sink current of each output is controlled by a
dedicated Port Isink Register. The lower four bits of this
register contain a code selecting one of sixteen sink current
levels. The upper four bits of the register are ignored. The
format of the Port Isink Register is shown in Figure 6-12.
Port 0 is a low-current port suitable for connecting photo
transistors. Port 1 is a high current port capable of driving
LEDs. See section 8.0 for current ranges. 0000 is the lowest
drive strength. 1111 is the highest.
The write-only sink current control registers for Port 0 outputs
are assigned from I/O address 0x30 to 0x37 with the control
bits for P00 starting at 0x30. Port 1 sink current control
registers are assigned from I/O address 0x38 to 0x3F with the
control bits for P10 starting at 0x38. All sink current control
registers are cleared during a reset, resulting in the minimum
current sink setting.
Table 6-2. Output Control Truth Table
Data Register
Port Pull-up Register
Output at I/O Pin
Interrupt Polarity
0
0
Sink Current (‘0’)
High to Low
0
1
Sink Current (‘0’)
Low to High
1
0
Pull-up Resistor (‘1’)
High to Low
1
1
Hi-Z
Low to High
b7
b6
b5
b4
b3
b2
b1
b0
PULL0.7
PULL0.6
PULL0.5
PULL0.4
PULL0.3
PULL0.2
PULL0.1
PULL0.0
W
W
W
W
W
W
W
W
0
0
0
0
0
0
0
0
Figure 6-10. Port 0 Pull-up Register (Address 0x08)
b7
b6
b5
b4
b3
b2
b1
b0
PULL1.7
PULL1.6
PULL1.5
PULL1.4
PULL1.3
PULL1.2
PULL1.1
PULL1.0
W
W
W
W
W
W
W
W
0x
0
0
0
0
0
0
0
Figure 6-11. Port 1 Pull-up Register (Address 0x09)
b7
b6
b5
b4
b3
b2
b1
b0
Reserved
Reserved
Reserved
UNUSED
ISINK3
ISINK2
ISINK1
ISINK0
W
W
W
W
W
W
W
W
x
x
x
x
x
x
x
x
Figure 6-12. Port Isink Register for One GPIO Line
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
