PRELIMINARY
CY7C9915
Document #: 38-07687 Rev. *A
Page 2 of 14
Block Diagram Description
Phase Frequency Detector and Filter
These two blocks accept inputs from the Reference Frequency
(REF) input and the Feedback (FB) input and generate
correction information to control the frequency of the
Voltage-Controlled Oscillator (VCO). These blocks, along with
the VCO, form a Phase-Locked Loop (PLL) that tracks the
incoming REF signal.
VCO and Time Unit Generator
The VCO accepts analog control inputs from the PLL filter
block and generates a frequency that is used by the time unit
generator to create discrete time units that are selected in the
skew select matrix. The operational range of the VCO is deter-
mined by the FS control pin. The time unit (tU) is determined
by the operating frequency of the device and the level of the
FS pin as shown in Table 1.
Skew Select Matrix
The skew select matrix is comprised of four independent
sections. Each section has two low-skew, high-fanout drivers
(xQ0, xQ1), and two corresponding three-level function select
(xF0, xF1) inputs. Table 2 below shows the nine possible
output functions for each section as determined by the function
select inputs. All times are measured with respect to the REF
input assuming that the output connected to the FB input has
0tU selected.
Notes:
1. For all three-state inputs, HIGH indicates a connection to VCC, LOW indicates a connection to GND, and MID indicates an open connection. Internal termination
circuitry holds an unconnected input to VCC/2.
2. The level to be set on FS is determined by the “normal” operating frequency (fNOM) of the VCO and Time Unit Generator (see Logic Block Diagram). Nominal
frequency (fNOM) always appears at 1Q0 and the other outputs when they are operated in their undivided modes (see Table 2). The frequency appearing at the
REF and FB inputs will be fNOM when the output connected to FB is undivided. The frequency of the REF and FB inputs will be fNOM/2 or fNOM/4 when the part
is configured for a frequency multiplication by using a divided output as the FB input.
Pin Definitions (CY7C9915)
Pin No.
Name
I/O
Type
Description
1
REF
Input
LVTTL/LVCMOS
Reference Clock Input
17
FB
Input
LVTTL
Feedback Clock Input
3
FS
Input
Three-level
Three Level Frequency Range Select
26,27
1F0, 1F1
Input
Three-level
Three level function select for 1Q0,1Q1
29,30
2F0, 2F1
Input
Three-level
Three level function select for 2Q0,2Q1
4,5
3F0, 3F1
Input
Three-level
Three level function select for 3Q0,3Q1
6,7
4F0, 4F1
Input
Three-level
Three level function select for 4Q0,4Q1
31
Test
Input
Three-level
Three level select for test modes
23,24
1Q0, 1Q1
Output
LVTTL
Output Pair
19,20
2Q0, 2Q1
Output
LVTTL
Output Pair
14,15
3Q0, 3Q1
Output
LVTTL
Output Pair
10,11
4Q0, 4Q1
Output
LVTTL
Output Pair
25
VCCN1
Power
POWER
3.3V Power Supply for output pair 1Q0 and 1Q1.
18
VCCN2
Power
POWER
3.3V Power Supply for output pair 2Q0 and 2Q1.
16
VCCN3
Power
POWER
3.3V Power Supply for output pair 3Q0 and 3Q1.
9
VCCN4
Power
POWER
3.3V Power Supply for output pair 4Q0 and 4Q1.
2,8
VCCQ
Power
POWER
3.3V Core Power
12,13,21,22,
28, 32
GND
Ground
POWER
Ground
Table 1. Frequency Range Select and tU Calculation[1]
FS[2]
fNOM (MHz)
where N =
Approximate
Frequency (MHz)
At Which tU = 1.0
ns
Min.
Max.
LOW
15
30
44
22.7
MID
25
50
26
38.5
HIGH
40
150
16
62.5
tU
1
fNOM N
×
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