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CY7C1472BV33-250BZXI Datasheet(PDF) 11 Page - Cypress Semiconductor

Part # CY7C1472BV33-250BZXI
Description  72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1472BV33-250BZXI Datasheet(HTML) 11 Page - Cypress Semiconductor

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CY7C1470BV33
CY7C1472BV33, CY7C1474BV33
Document #: 001-15031 Rev. *C
Page 11 of 30
Table 5. Partial Write Cycle Description
The partial write cycle description for CY7C1470BV33, CY7C1472BV33, and CY7C1474BV33 follows.[1, 2, 3, 8]
Function (CY7C1470BV33)
WE
BWd
BWc
BWb
BWa
Read
H
X
X
X
X
Write – No bytes written
L
H
H
H
H
Write Byte a – (DQa and DQPa)L
H
H
H
L
Write Byte b – (DQb and DQPb)L
H
H
L
H
Write Bytes b, a
L
H
H
L
L
Write Byte c – (DQc and DQPc)L
H
L
H
H
Write Bytes c, a
L
H
L
H
L
Write Bytes c, b
L
H
L
L
H
Write Bytes c, b, a
L
H
L
L
L
Write Byte d – (DQd and DQPd)
L
L
HHH
Write Bytes d, a
L
L
H
H
L
Write Bytes d, b
L
L
H
L
H
Write Bytes d, b, a
L
L
H
L
L
Write Bytes d, c
L
L
L
H
H
Write Bytes d, c, a
L
L
L
H
L
Write Bytes d, c, b
L
L
L
L
H
Write All Bytes
L
L
L
L
L
Function (CY7C1472BV33)
WE
BWb
BWa
Read
Hx
x
Write – No Bytes Written
L
H
H
Write Byte a – (DQa and DQPa)L
H
L
Write Byte b – (DQb and DQPb)L
L
H
Write Both Bytes
L
L
L
Function (CY7C1474BV33)
WE
BWx
Read
Hx
Write – No Bytes Written
L
H
Write Byte X
− (DQ
x and DQPx)
LL
Write All Bytes
L
All BW = L
Note
8. Table lists only a partial listing of the Byte Write combinations. Any combination of BW[a:d] is valid. Appropriate Write is based on which Byte Write is active.
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