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CY7C1470BV25
CY7C1472BV25, CY7C1474BV25
Document #: 001-15032 Rev. *D
Page 2 of 29
Logic Block Diagram – CY7C1470BV25 (2M x 36)
Logic Block Diagram – CY7C1472BV25 (4M x 18)
A0, A1, A
C
MODE
BW a
BW b
WE
CE1
CE2
CE3
OE
READ LOGIC
DQ s
DQ Pa
DQ Pb
DQ Pc
DQ Pd
D
A
T
A
S
T
E
E
R
I
N
G
O
U
T
P
U
T
B
U
F
F
E
R
S
MEMORY
ARRAY
E
E
INPUT
REGISTER 0
ADDRESS
REGISTER 0
WRITE ADDRESS
REGISTER 1
WRITE ADDRESS
REGISTER 2
WRITE REGISTRY
AND DATA COHERENCY
CONTROL LOGIC
BURST
LOGIC
A0'
A1'
D1
D0
Q1
Q0
A0
A1
C
ADV/LD
ADV/LD
E
INPUT
REGISTER 1
S
E
N
S
E
A
M
P
S
E
CLK
CEN
WRITE
DRIVERS
BW c
BW d
ZZ
SLEEP
CONTROL
O
U
T
P
U
T
R
E
G
I
S
T
E
R
S
A0, A1, A
C
MODE
BW a
BW b
WE
CE1
CE2
CE3
OE
READ LOGIC
DQ s
DQ Pa
DQ Pb
D
A
T
A
S
T
E
E
R
I
N
G
O
U
T
P
U
T
B
U
F
F
E
R
S
MEMORY
ARRAY
E
E
INPUT
REGISTER 0
ADDRESS
REGISTER 0
WRITE ADDRESS
REGISTER 1
WRITE ADDRESS
REGISTER 2
WRITE REGISTRY
AND DATA COHERENCY
CONTROL LOGIC
BURST
LOGIC
A0'
A1'
D1
D0
Q1
Q0
A0
A1
C
ADV/LD
ADV/LD
E
INPUT
REGISTER 1
S
E
N
S
E
A
M
P
S
O
U
T
P
U
T
R
E
G
I
S
T
E
R
S
E
CLK
CEN
WRITE
DRIVERS
ZZ
Sleep
Control
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