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CY7C1371DV25
CY7C1373DV25
Document #: 38-05557 Rev. *D
Page 8 of 28
TDI
JTAG serial input
Synchronous
Serial data-In to the JTAG circuit. Sampled on the rising edge of TCK. If the JTAG
feature is not being utilized, this pin can be left floating or connected to VDD through
a pull-up resistor. This pin is not available on TQFP packages.
TMS
JTAG serial input
Synchronous
Serial data-In to the JTAG circuit. Sampled on the rising edge of TCK. If the JTAG
feature is not being utilized, this pin can be disconnected or connected to VDD. This
pin is not available on TQFP packages.
TCK
JTAG-
Clock
Clock input to the JTAG circuitry. If the JTAG feature is not being utilized, this pin
must be connected to VSS. This pin is not available on TQFP packages.
NC
–
No Connects. Not internally connected to the die. 36 Mbit, 72 Mbit, 144 Mbit,
288 Mbit, 576 Mbit and 1 Gbit are address expansion pins and are not internally
connected to the die.
Pin Definitions (continued)
Name
I/O
Description
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