PRELIMINARY
CY7C1317AV18
CY7C1319AV18
CY7C1321AV18
Document #: 38-05500 Rev. *B
Page 8 of 20
Linear Burst Address Table (CY7C1319AV18 and CY7C1321AV18)
First Address (External)
Second Address (Internal)
Third Address (Internal)
Fourth Address (Internal)
X..X00
X..X01
X..X10
X..X11
X..X01
X..X10
X..X11
X..X00
X..X10
X..X11
X..X00
X..X01
X..X11
X..X00
X..X01
X..X10
Write Cycle Descriptions[2, 8](CY7C1317AV18 and CY7C1319AV18)
BWS0 BWS1 KK
Comments
L
L
L-H
-
During the Data portion of a Write sequence
:
CY7C1317AV18
− both nibbles (D[7:0]) are written into the device,
CY7C1319AV18
− both bytes (D[17:0]) are written into the device.
L
L
-
L-H During the Data portion of a Write sequence
:
CY7C1317AV18
− both nibbles (D[7:0]) are written into the device,
CY7C1319AV18
− both bytes (D[17:0]) are written into the device.
L
H
L-H
-
During the Data portion of a Write sequence
:
CY7C1317AV18
− only the lower nibble (D[3:0]) is written into the device. D[7:4] will remain unaltered,
CY7C1319AV18
− only the lower byte (D[8:0]) is written into the device. D[17:9] will remain unaltered.
L
H
-
L-H During the Data portion of a Write sequence
:
CY7C1317AV18
− only the lower nibble (D[3:0]) is written into the device. D[7:4] will remain unaltered,
CY7C1319AV18
− only the lower byte (D[8:0]) is written into the device. D[17:9] will remain unaltered.
H
L
L-H
-
During the Data portion of a Write sequence
:
CY7C1317AV18
− only the upper nibble (D[7:4]) is written into the device. D[3:0] will remain unaltered,
CY7C1319AV18
− only the upper byte (D[17:9]) is written into the device. D[8:0] will remain unaltered.
H
L
-
L-H During the Data portion of a Write sequence
:
CY7C1317AV18
− only the upper nibble (D[7:4]) is written into the device. D[3:0] will remain unaltered,
CY7C1319AV18
− only the upper byte (D[17:9]) is written into the device. D[8:0] will remain unaltered.
H
H
L-H
-
No data is written into the devices during this portion of a Write operation.
H
H
-
L-H No data is written into the devices during this portion of a Write operation.
Write Cycle Descriptions (CY7C1321AV18) [2, 8]
BWS0 BWS1 BWS2 BWS3
KK
Comments
LLLL
L-H
-
During the Data portion of a Write sequence, all four bytes (D[35:0]) are written
into the device.
LLLL
-
L-H
During the Data portion of a Write sequence, all four bytes (D[35:0]) are written
into the device.
L
H
H
H
L-H
-
During the Data portion of a Write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] will remain unaltered.
L
H
H
H
-
L-H
During the Data portion of a Write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] will remain unaltered.
H
L
H
H
L-H
-
During the Data portion of a Write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] will remain unaltered.
H
L
H
H
-
L-H
During the Data portion of a Write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] will remain unaltered.
H
H
L
H
L-H
-
During the Data portion of a Write sequence, only the byte (D[26:18]) is written
into the device. D[17:0] and D[35:27] will remain unaltered.
H
H
L
H
-
L-H
During the Data portion of a Write sequence, only the byte (D[26:18]) is written
into the device. D[17:0] and D[35:27] will remain unaltered.
H
H
H
L
L-H
During the Data portion of a Write sequence, only the byte (D[35:27]) is written
into the device. D[26:0] will remain unaltered.
H
H
H
L
-
L-H
During the Data portion of a Write sequence, only the byte (D[35:27]) is written
into the device. D[26:0] will remain unaltered.
HHHH
L-H
-
No data is written into the device during this portion of a Write operation.
HHHH
-
L-H
No data is written into the device during this portion of a Write operation.
Note:
8. Assumes a Write cycle was initiated per the Write Cycle Description Truth Table. BWS0, BWS1 in the case of CY7C1317AV18 and CY7C1319AV18 and also
BWS2, BWS3 in the case of CY7C1321AV18 can be altered on different portions of a write cycle, as long as the set-up and hold requirements are achieved.
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