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CY7C1297A1-50AC Datasheet(PDF) 8 Page - Cypress Semiconductor

Part # CY7C1297A1-50AC
Description  64K X 18 Synchronous Burst SRAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1297A1-50AC Datasheet(HTML) 8 Page - Cypress Semiconductor

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CY7C1297A/
GVT7164B18
Document #: 38-05204 Rev. *A
Page 8 of 13
Notes:
21. Overshoot: VIH(AC) <VDD + 1.5V for t <tTCYC/2; undershoot: VIL(AC) < 0.5V for t <tTCYC/2; power-up: VIH < 2.6V and VDD <2.4V and VDDQ < 1.4V for
t<200 ms.)
22. Capacitance derating applies to capacitance different from the load capacitance shown in part (a) of AC Test Loads. Values in table are associated with the
operating frequencies listed.
23. Test conditions as specified with the output loading as shown in part (a) of AC Test Loads unless otherwise noted.
24. Output loading is specified with CL = 5 pF as in AC Test Loads.
25. At any given temperature and voltage condition, tKQHZ is less than tKQLZ and tOEHZ is less than tOELZ.
26. OE is a “don’t care” when a byte Write enable is sampled LOW.
27. This is a synchronous device. All synchronous inputs must meet specified set-up and hold time, except for “don’t care” as defined in the truth table.
Switching Characteristics Over the Operating Range[23]
Parameter
Description
66 MHz
-9
50 MHz
-10
50 MHz
-12
Min.
Max.
Min.
Max.
Min.
Max.
Unit


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