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PRELIMINARY
CY7C1012AV25
Document #: 38-05337 Rev. **
Page 6 of 9
Write Cycle No. 1 (CE Controlled)[2, 14, 15]
Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[14, 15]
Write Cycle No. 3 (WE Controlled, OE LOW)[2, 15]
Notes:
14. Data I/O is high impedance if OE = VIH.
15. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
16. During this period the I/Os are in the output state and input signals should not be applied.
Switching Waveforms (continued)
tWC
DATA VALID
tAW
tSA
tPWE
tHA
tHD
tSD
tSCE
tSCE
CE
ADDRESS
WE
DATA I/O
tHD
tSD
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZOE
DATAIN VALID
CE
ADDRESS
WE
DATA I/O
OE
NOTE 16
DATA VALID
tHD
tSD
tLZWE
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZWE
CE
ADDRESS
WE
DATA I/O
NOTE 16
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