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CY7C132/CY7C136
CY7C142/CY7C146
Document #: 38-06031 Rev. *C
Page 6 of 18
Write Cycle[14]
tWC
Write Cycle Time
35
45
55
ns
tSCE
CE LOW to Write End
30
35
40
ns
tAW
Address Set-up to Write End
30
35
40
ns
tHA
Address Hold from Write End
2
2
2
ns
tSA
Address Set-up to Write Start
0
0
0
ns
tPWE
R/W Pulse Width
253030
ns
tSD
Data Set-up to Write End
15
20
20
ns
tHD
Data Hold from Write End
0
0
0
ns
tHZWE
R/W LOW to High Z [9]
20
20
25
ns
tLZWE
R/W HIGH to Low Z [9]
000
ns
Busy/Interrupt Timing
tBLA
BUSY LOW from Address Match
20
25
30
ns
tBHA
BUSY HIGH from Address Mismatch[15]
20
25
30
ns
tBLC
BUSY LOW from CE LOW
202530
ns
tBHC
BUSY HIGH from CE HIGH[15]
20
25
30
ns
tPS
Port Set Up for Priority
5
5
5
ns
tWB
R/W LOW after BUSY LOW[16]
000
ns
tWH
R/W HIGH after BUSY HIGH
30
35
35
ns
tBDD
BUSY HIGH to Valid Data
35
45
45
ns
tDDD
Write Data Valid to Read Data Valid
Note 17
Note 17
Note 17
ns
tWDD
Write Pulse to Data Delay
Note 17
Note 17
Note 17
ns
Interrupt Timing[18]
tWINS
R/W to INTERRUPT Set Time
25
35
45
ns
tEINS
CE to INTERRUPT Set Time
25
35
45
ns
tINS
Address to INTERRUPT Set Time
25
35
45
ns
tOINR
OE to INTERRUPT Reset Time[15]
25
35
45
ns
tEINR
CE to INTERRUPT Reset Time[15]
25
35
45
ns
tINR
Address to INTERRUPT Reset Time[15]
25
35
45
ns
Switching Characteristics Over the Operating Range (Speeds -35, -45, -55) (continued)[5, 10]
Parameter
Description
7C132-35
7C136-35
7C142-35
7C146-35
7C132-45
7C136-45
7C142-45
7C146-45
7C132-55
7C136-55
7C142-55
7C146-55
Unit
Min.
Max.
Min.
Max.
Min.
Max.
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