CY2SSTV857-27
Document #: 38-07464 Rev. *G
Page 7 of 9
Notes:
13. Period jitter and half-period jitter specifications are separate specifications that must be met independently of each other.
14. All differential input and output terminals are terminated with 120
Ω/16 pF, as shown in Figure 5.
tPLZ, tPHZ
Output Disable Time[12] (all outputs)
3
8
ns
tCCJ
Cycle to Cycle Jitter [10]
f > 66 MHz
–75
–
75
ps
tjit(h-per)
Half-period jitter[10, 13]
f > 66 MHz
–100
–
100
ps
tPLH(tPD)
Low-to-High Propagation Delay, CLK to Y
Test Mode only
1.5
3.5
7.5
ns
tPHL(tPD)
High-to-Low Propagation Delay, CLK to Y
1.5
3.5
7.5
ns
tSK(O)
Any Output to Any Output Skew[14]
100
ps
tPHASE
Phase Error[14]
–50
50
ps
AC Electrical Specifications (AVDD = VDDQ = 2.5V±5%, TA = 0°C to +85°C)(continued)[9, 10]
Parameter
Description
Condition
Min.
Typ.
Max.
Unit
Ordering Information
Part Number
Package Type
Product Flow
CY2SSTV857ZC-27
48-pin TSSOP
Commercial, 0
° to 70°C
CY2SSTV857ZC-27T
48-pin TSSOP–Tape and Reel
Commercial, 0
° to 70°C
CY2SSTV857ZI-27
48-pin TSSOP
Industrial, –40° to +85°C
CY2SSTV857ZI-27T
48-pin TSSOP–Tape and Reel
Industrial, –40° to +85°C
Lead-free
CY2SSTV857ZXC-27
48-pin TSSOP
Commercial, 0
° to 70°C
CY2SSTV857ZXC-27T
48-pin TSSOP–Tape and Reel
Commercial, 0
° to 70°C
CY2SSTV857ZXI-27
48-pin TSSOP
Industrial, –40° to +85°C
CY2SSTV857ZXI-27T
48-pin TSSOP–Tape and Reel
Industrial, –40° to +85°C