R

Use the following formula to select the appropriate resistor

values:

V

where V

Select resistors between 10k

Ω and 100kΩ. (1% or higher

accuracy metal film resistors for R

COMPENSATION COMPONENTS

In the control to output transfer function, the first pole F

be estimated as 1/(2

πR

output capacitor is 1/(2

πESRC

frequency pole F

F

πn(1−D))

whereD=V

and V

The total loop gain G is approximately 500/I

is in amperes.

A Gm amplifier is used inside the LM2653. The output resis-

tor R

Ω.C

together with R

F

πC

πC

In some applications, the ESR zero F

by F

ESR zero, F

πC

The rule of thumb is to have more than 45˚ phase margin at

the crossover frequency (G=1).

If C

Ω are

good choices for most applications. If the ESR zero is too

low to be cancelled by F

If the transient response to a step load is important, choose

R

Ω.

EXTERNAL SCHOTTKY DIODE

A Schottky diode D

body diode of the low-side MOSFET from conducting during

the deadtime in PWM operation and hysteretic mode when

both MOSFETs are off. If the body diode turns on, there is

extra power dissipation in the body diode because of the

reverse-recovery current and higher forward voltage; the

high-side MOSFET also has more switching loss since the

negative diode reverse-recovery current appears as the

high-side MOSFET turn-on current in addition to the load

current. These losses degrade the efficiency by 1-2%. The

improved efficiency and noise immunity with the Schottky

diode become more obvious with increasing input voltage

and load current.

The breakdown voltage rating of D

higher than the maximum input voltage. Since D

for a short period of time, the average current rating for D

1

only requires being higher than 30% of the maximum output

current. It is important to place D

source of the low-side MOSFET, extra parasitic inductance

in the parallel loop will slow the turn-on of D

current through the body diode of the low-side MOSFET.

PCB Layout Considerations

Layout is critical to reduce noises and ensure specified

performance. The important guidelines are listed as follows:

1.

Minimize the parasitic inductance in the loop of input

capacitors and the internal MOSFETs by connecting the

input capacitors to V

wide traces. This is important because the rapidly

switching current, together with wiring inductance can

generate large voltage spikes that may result in noise

problems.

2.

Minimize the trace from the center of the output resistor

divider to the FB pin and keep it away from noise

sources to avoid noise pick up. For applications require

tight regulation at the output, a dedicated sense trace

(separated from the power trace) is recommended to

connect the top of the resistor divider to the output.

3.

If the Schottky diode D

connecting D

10104901

Schematic for the Typical Board Layout

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