Functional Description
The PEEL16V8 implements logic functions as sum-
of-products expressions in a programmable-
AND/fixed-OR logic array. User-defined functions
are created by programming the connections of in-
put signals into the array. User-configurable output
structures in the form of macrocells further increase
logic flexibility.
Architecture Overview
The PEEL16V8 features ten dedicated input pins
and eight I/O pins, which allow a total of up to 16
inputs and 8 outputs for creating logic functions. At
the core of the device is a programmable electri-
cally-erasable AND array which drives a fixed OR
array. With this structure the PEEL16V8 can imple-
ment up to 8 sum-of-products logic expressions.
Associated with each of the eight OR functions is a
macrocell which can be independently programmed
to one of up to four different basic configurations.
The programmable macrocells allow each I/O to
create sequential or combinatorial logic functions of
active-high or active-low polarity, while providing two
possible feedback paths into the array.
Three different device modes, Simple, Complex and
Registered, support various user configurations. In
Simple mode, a macrocell can be configured for
combinatorial function with the output buffer perma-
nently enabled, or the output buffer can be disabled
and the I/O pin used as a dedicated input. In Com-
plex mode, a macrocell is configured for combina-
torial function with the output buffer enable control-
led by a product term. In Registered mode, a macro-
cell can be configured for registered operation with
the register clock and output buffer enable control-
led directly from pins, or can be configured for com-
binatorial function with the output buffer enable con-
trolled by a product term. In most cases, the device
mode is set automatically by the development soft-
ware based on the features specified in the design.
The three device modes support designs created
explicitly for the PEEL16V8, as well as designs cre-
ated originally for popular PAL devices such as the
16R4, 16R8 and 16L8. Table 1 shows the device
mode used to emulate the various PALs. Design
conversion into the 16V8 is accommodated by
JEDEC-to-JEDEC translators available from ICT, as
well as several programmers which can read the
original PAL JEDEC file and automatically program
the 16V8 to perform the same function.
AND/OR Logic Array
The programmable AND array of the PEEL16V8 is
formed by input lines intersecting product terms.
The input lines and product terms are used as fol-
lows:
32 input lines:
16 input lines carry the true and complement of
the signals applied to the 8 dedicated input pins
16 additional lines carry the true and complement
of 8 macrocell feedback signals or inputs from I/O
pins or the clock/OE pins
64 product terms:
56 product terms (arranged in 8 groups of 7) form
sum-of-product functions for macrocell combina-
torial or registered logic
8 product terms (arranged 1 per macrocell) add an
additional product term for macrocell sum-of-prod-
ucts functions or I/O pin output enable control
At each input-line/product-term intersection there is
an EEPROM memory cell which determines
whether or not there is a logical connection at that
intersection. Each product term is essentially a 32-
input AND gate. A product term which is connected to
both the true and complement of an input signal will
always be FALSE and thus will not affect the OR func-
tion that it drives. When all the connections on a product
term are opened, that term will always be TRUE.
When programming the PEEL16V8, the device pro-
grammer first performs a bulk erase to remove the
previous pattern. The erase cycle opens every logical
connection in the array. The device is configured to
perform the user-defined function by programming
selected connections in the AND array. (Note that
PEEL device programmers automatically program all
of the connections on unused product terms so that
they will have no effect on the output function.)
Table 1. PEEL16V8/PAL Device Compatibility
PAL Architecture
Compatibility
PEEL16V8
Device Mode
10H8
Simple
10L8
Simple
10P8
Simple
12H6
Simple
12L6
Simple
12P6
Simple
14H4
Simple
14L4
Simple
14P4
Simple
16H2
Simple
16HD8
Simple
16L2
Simple
16LD8
Simple
16P2
Simple
16H8
Complex
16L8
Complex
16P8
Complex
16R4
Registered
16R6
Registered
PEEL™ 16V8
3-8
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