and with the maximum data transfer of 1.785 Gbit/s. Addi-

tional applications information can be found in the following

National Interface Application Notes:

AN = ####

Topic

AN-1041

Introduction to Channel Link

AN-1108

Channel Link PCB and Interconnect

Design-In Guidelines

AN-1109

Multi-Drop Channel-Link Operation

AN-806

Transmission Line Theory

AN-905

Transmission Line Calculations and

Differential Impedance

AN-916

Cable Information

CABLES

A cable interface between the transmitter and receiver needs

to support the differential LVDS pairs. The ideal cable/

connector interface would have a constant 100

Ω differential

impedance throughout the path. It is also recommended that

maintain a sufficient data sampling window at the receiver.

In addition to the four or five cable pairs that carry data and

clock, it is recommended to provide at least one additional

conductor (or pair) which connects ground between the

transmitter and receiver. This low impedance ground pro-

vides a common-mode return path for the two devices.

Some of the more commonly used cable types for point-to-

point applications include flat ribbon, flex, twisted pair and

Twin-Coax. All are available in a variety of configurations and

options. Flat ribbon cable, flex and twisted pair generally

perform well in short point-to-point applications while Twin-

Coax is good for short and long applications. When using

ribbon cable, it is recommended to place a ground line

between each differential pair to act as a barrier to noise

coupling between adjacent pairs. For Twin-Coax cable ap-

plications, it is recommended to utilize a shield on each

cable pair. All extended point-to-point applications should

also employ an overall shield surrounding all cable pairs

regardless of the cable type. This overall shield results in

improved transmission parameters such as faster attainable

speeds, longer distances between transmitter and receiver

and reduced problems associated with EMS or EMI.

The high-speed transport of LVDS signals has been demon-

strated on several types of cables with excellent results.

However, the best overall performance has been seen when

using Twin-Coax cable. Twin-Coax has very low cable skew

and EMI due to its construction and double shielding. All of

the design considerations discussed here and listed in the

supplemental application notes provide the subsystem com-

munications designer with many useful guidelines. It is rec-

ommended that the designer assess the tradeoffs of each

application thoroughly to arrive at a reliable and economical

cable solution.

BOARD LAYOUT

To obtain the maximum benefit from the noise and EMI

reductions of LVDS, attention should be paid to the layout of

differential lines. Lines of a differential pair should always be

adjacent to eliminate noise interference from other signals

and take full advantage of the noise canceling of the differ-

ential signals. The board designer should also try to maintain

equal length on signal traces for a given differential pair. As

with any high-speed design, the impedance discontinuities

should be limited (reduce the numbers of vias and no 90

degree angles on traces). Any discontinuities which do occur

on one signal line should be mirrored in the other line of the

differential pair. Care should be taken to ensure that the

differential trace impedance match the differential imped-

ance of the selected physical media (this impedance should

also match the value of the termination resistor that is con-

nected across the differential pair at the receiver’s input).

Finally, the location of the CHANNEL LINK TxOUT pins

should be as close as possible to the board edge so as to

eliminate excessive pcb runs. All of these considerations will

limit reflections and crosstalk which adversely effect high

frequency performance and EMI.

UNUSED INPUTS

All unused inputs at the TxIN inputs of the transmitter may be

tied to ground or left no connect.

TERMINATION

Use of current mode drivers requires a terminating resistor

across the receiver inputs. The CHANNEL LINK chipset will

normally require a single 100

Ω resistor between the true and

complement lines on each differential pair of the receiver

input. The actual value of the termination resistor should be

selected to match the differential mode characteristic imped-

ance (90

Ω to 120Ω typical) of the cable. Figure 11 shows an

example. No additional pull-up or pull-down resistors are

necessary as with some other differential technologies such

as PECL. Surface mount resistors are recommended to

avoid the additional inductance that accompanies leaded

resistors. These resistors should be placed as close as

possible to the receiver input pins to reduce stubs and

effectively terminate the differential lines.

20190324

FIGURE 11. LVDS Serialized Link Termination

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