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LM95231BIMM-1 Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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LM95231BIMM-1 Datasheet(HTML) 6 Page - National Semiconductor (TI) |
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6 / 20 page  Logic Electrical Characteristics (Continued) SMBus Digital Switching Characteristics (Continued) Unless otherwise noted, these specifications apply for V DD=+3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80 pF. Boldface limits apply for T A =TJ =TMIN to TMAX; all other limits TA =TJ = +25˚C, unless otherwise noted. The switching characteristics of the LM95231 fully meet or exceed the published specifications of the SMBus version 2.0. The following pa- rameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM95231. They adhere to but are not necessarily the SMBus bus specifications. Symbol Parameter Conditions Typical Limits Units (Note 6) (Note 7) (Limit) t HD;DAT Data Out Stable after SMBCLK Low 300 1075 ns (min) ns (max) t HD;STA Start Condition SMBDAT Low to SMBCLK Low (Start condition hold before the first clock falling edge) 100 ns (min) t SU;STO Stop Condition SMBCLK High to SMBDAT Low (Stop Condition Setup) 100 ns (min) t SU;STA SMBus Repeated Start-Condition Setup Time, SMBCLK High to SMBDAT Low 0.6 µs (min) t BUF SMBus Free Time Between Stop and Start Conditions 1.3 µs (min) SMBus Communication 20120209 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is guaranteed to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test condition listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Operation of the device beyond the Maximum Operating Ratings is not recommended. Note 2: When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5 mA. Parasitic components and or ESD protection circuitry are shown in the figures below for the LM95231’s pins. Care should be taken not to forward bias the parasitic diode, D1, present on pins: D1+, D2+, D1−, D2−. Doing so by more than 50 mV may corrupt the temperature measurements. www.national.com 6 |
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