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L6181DPLCC28 Datasheet(PDF) 7 Page - STMicroelectronics |
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L6181DPLCC28 Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 10 page INPUT BALANCE MEASUREMENT The balance of the receiver input voltage-current characteristics and bias voltages shall be such that the receiver will remain in the intended binary state when a differential voltage Vi of 400mV is applied through 500 Ω ±1% to each input terminal, as shown above, and Vcm is varied between -7 and +7V. When the polarity of Vi is reversed, the opposite binary state shall be maintained under the same conditions. Maintain input balance with input B common with another receiver. The voltage input (VIN) rejection is checked at the center point between the High Operating Thresh- old (Vth2) and the Low OperatingThreshold (Vth1) Figure 7: Receiver input Balance Measurement Figure 8: High Frequency Signal Rejection L6180 - L6181 7/10 |
Similar Part No. - L6181DPLCC28 |
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Similar Description - L6181DPLCC28 |
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