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OP284GBC Datasheet(PDF) 6 Page - Analog Devices |
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OP284GBC Datasheet(HTML) 6 Page - Analog Devices |
6 / 24 page OP184/OP284/OP484 Rev. D | Page 6 of 24 ABSOLUTE MAXIMUM RATINGS Table 4. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameter Rating Supply Voltage ±18 V Input Voltage ±18 V Differential Input Voltage ±0.6 V 1 Indefinite Output Short-Circuit Duration to GND Storage Temperature Range Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. P-Suffix, S-Suffix Packages −65°C to +150°C Operating Temperature Range OP184/OP284/OP484E/OP484F −40°C to +125°C THERMAL RESISTANCE Junction Temperature Range θ is specified for the worst-case conditions; that is, θ P-Suffix, S-Suffix Packages −65°C to +150°C JA JA is specified for device in socket for CERDIP and PDIP. θ Lead Temperature (Soldering 60 sec) 300°C JA is specified for device soldered in circuit board for SOIC packages. 1 For input voltages greater than 0.6 V, the input current should be limited to less than 5 mA to prevent degradation or destruction of the input devices. Table 5. Thermal Resistance Package Type θ θ Unit JA JC 8-Lead PDIP (P-Suffix) 103 43 °C/W 8-Lead SOIC (S-Suffix) 158 43 °C/W 14-Lead PDIP (P-Suffix) 83 39 °C/W 14-Lead SOIC (S-Suffix) 92 27 °C/W ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. R3 Q1 –IN +IN QL1 QL2 Q4 Q3 Q2 QB5 QB6 RB2 QB3 R1 Q5 R2 QB4 JB2 QB1 N+ CB1 P+ M QB2 CC1 Q9 Q7 Q11 Q8 Q6 Q10 Q12 QB7 QB8 QB9 RB1 JB1 TP R4 R5 R6 RB3 FF C R7 R8 Q13 Q14 R10 Q15 RB4 QB10 CC2 C O Q17 Q16 R11 Q18 VCC OUT VEE R9 Figure 4. Simplified Schematic |
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