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CY2254A Datasheet(PDF) 2 Page - SpectraLinear Inc |
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CY2254A Datasheet(HTML) 2 Page - SpectraLinear Inc |
2 / 7 page CY2254A Rev 1.0, November 25, 2006 Page 2 of 7 Pin Summary Name 1 2 Description VDD 1 1 Voltage supply XTALIN[1] 2 2 Reference crystal input XTALOUT[1] 3 3 Reference crystal feedback VSS 4 4 Ground OE 5 5 Output Enable, Active HIGH (internal pull-up resistor to VDD) CPUCLK0 6 6 CPU clock output CPUCLK1 7 7 CPU clock output VDD 8 8 Voltage supply CPUCLK2 9 9 CPU clock output CPUCLK3 10 10 CPU clock output VSS 11 11 Ground S1 12 12 CPU clock select input, bit 1 (internal pull-up resistor to VDD) S0 13 13 CPU clock select input, bit 0 (internal pull-up resistor to VDD) VDD 14 14 Voltage supply PCICLK0 15 15 PCI clock output PCICLK1 16 16 PCI clock output VSS 17 17 Ground PCICLK5 18 18 PCI clock output PCICLK4 19 19 PCI clock output VDD 20 20 Voltage supply PCICLK3 21 21 PCI clock output PCICLK2 22 22 PCI clock output VSS 23 23 Ground IOCLK 24 24 I/O clock output (24 MHz) KBDCLK 25 Keyboard controller clock output (12 MHz) USBCLK 25 Universal Serial Bus clock output (48 MHz) VDD 26 26 Voltage supply REF1 27 27 Reference clock output (14.318 MHz) REF0 28 28 Reference clock output (14.318 MHz) Function Table Option OE S0 S1 XTALIN CPUCLK PCICLK Ref. Clock Output IOCLK KBDCLK 1 only USBCLK 2 only 1, 2 0 X X 14.318 MHz High-Z High-Z High-Z High-Z High-Z High-Z 1, 2 1 0 0 14.318 MHz 50.0 MHz 25.0 MHz 14.318 MHz 24 MHz 12 MHz 48 MHz 1, 2 1 0 1 14.318 MHz 60.0 MHz 30.0 MHz 14.318 MHz 24 MHz 12 MHz 48 MHz 1, 2 1 1 0 14.318 MHz 66.66 MHz 33.33 MHz 14.318 MHz 24 MHz 12 MHz 48 MHz 1 1 1 1 TCLK[2] TCLK/2 TCLK/4 TCLK TCLK/4 TCLK/8 2 1 1 1 14.318 MHz 55.0 MHz 27.5 MHz 14.318 MHz 24 MHz 48 MHz Note: 1. For best accuracy, use a parallel-resonant crystal, CLOAD = 17 pF. 2. TCLK is a test clock on XTALIN (pin 2) during test mode. |
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Similar Description - CY2254A |
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