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ADN2805ACPZ-RL7 Datasheet(PDF) 3 Page - Analog Devices

Part No. ADN2805ACPZ-RL7
Description  1.25 Gbps Clock and Data Recovery IC
Download  16 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADN2805ACPZ-RL7 Datasheet(HTML) 3 Page - Analog Devices

 
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ADN2805
Rev. 0 | Page 3 of 16
SPECIFICATIONS
TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 0.47 μF, SLICEP = SLICEN = VEE, input data pattern: PRBS 223 − 1,
unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
QUANTIZER—DC CHARACTERISTICS
Input Voltage Range
@ PIN or NIN, dc-coupled
1.8
2.8
V
Peak-to-Peak Differential Input
PIN − NIN
0.2
2.0
V
Input Common-Mode Level
DC-coupled
2.3
2.5
2.8
V
QUANTIZER—AC CHARACTERISTICS
Data Rate
1250
Mbps
S11
@ 2.5 GHz
−15
dB
Input Resistance
Differential
100
Ω
Input Capacitance
0.65
pF
LOSS-OF-LOCK (LOL) DETECT
VCO Frequency Error for LOL Assert
With respect to nominal
1000
ppm
VCO Frequency Error for LOL Deassert
With respect to nominal
250
ppm
LOL Response Time
200
μs
ACQUISITION TIME
Lock-to-Data Mode
GbE
1.5
ms
Optional Lock to REFCLK Mode
20.0
ms
DATA RATE READBACK ACCURACY
Fine Readback
In addition to REFCLK accuracy
100
ppm
POWER SUPPLY
Power Supply Voltage
3.0
3.3
3.6
V
Power Supply Current
Locked to 1.25 Gbps
118
131
mA
OPERATING TEMPERATURE RANGE
−40
+85
°C
JITTER SPECIFICATIONS
TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 0.47 μF, SLICEP = SLICEN = VEE, input data pattern: PRBS 223 − 1,
unless otherwise noted.
Table 2.
Parameter
Conditions
Min
Typ
Max
Unit
PHASE-LOCKED LOOP CHARACTERISTICS
Jitter Peaking
0
0.03
dB
Jitter Generation
0.001
0.003
UI rms
0.02
0.04
UI p-p
Jitter Tolerance
GbE, IEEE 802.3, 637 kHz
0.749
UI p-p


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