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ISB35666 Datasheet(PDF) 7 Page - STMicroelectronics |
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ISB35666 Datasheet(HTML) 7 Page - STMicroelectronics |
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7 / 15 page  Temperature °C KT -55 0.77 -40 0.83 25 1.00 70 1.13 85 1.17 125 1.27 VDD KV 2.7 1.20 3.0 1.11 3.3 1.00 3.6 0.94 All pads except the sixteen corner pads can be configured as power or I/O pads. The configured power pads are known as placeable pads and have an associated current handling capability. Their placement is dependent on the types of output buffers used in the design. For rules governing the placement of pads, please contact your local SGS- THOMSON design centre. CORE LOGIC The propagation delays shown in the ISB35000 data book are given for nominal processing, 3.3V operation, and 25 C temperature conditions. However there are additional factors that affect the delay characteristics of the macrocells. These in- clude loading due to fanout and interconnect rout- ing, voltage supply, junction temperature of the device, processing tolerance and input signal tran- sition time. Prior to physical layout, the design system can estimate the delays associated with any critical path. The impact of the placement and rout- ing can be accurately RC back annotated from the layout for final simulations of critical timing. The effects of junction temperature, (KT) and voltage supply (KV) on the delay numbers are summarized in Table 4. A third factor, is associated with process Table 4. Temperature (Junction) and Voltage Multipliers variation. This multiplier has a minimum of 0.6 and a maximum of 1.6. MACROCELLS AND MACROFUNCTIONS The ISB35000 series has internal macrocells that are robust in variety and performance. The cell selection has been driven by the need of Synthesis and HDL based design techniques. This offering is rich in buffers, complex combinatorial cells and multi power drive cells, which allow the Synthesis tool to create a netlist compatible with the require- ments of Place and Route tools. Macrofunctions are a series of soft-macros facilitat- ing quick capture of large functional blocks and are available for such functions as counters, shift reg- ister and adders. Macrofunctions are implemented at layout by utilizing macrocells and interconnecting to create the logic function. MODULE GENERATORS A series of module generators are available to support a range of megafunctions. These modules enable the designer to choose individual parame- ters in order to create a compiled cell, which meets the specific application requirements. Generators are available for megafunctions such as single port RAM and dual port RAM. These are constructed utilising the existing base array transis- tors, and are also referred to as metallised megafunctions. EMBEDDED FUNCTIONS In addition to the metallised functions described above, embedded megafunction generators are also available. These include single port RAM, dual port RAM and ROM. The compiled cell generators construct custom cells, which are implemented using a special leaf cell technique, ensuring predictable layout and ac- curate module characteristics. In choosing megafunctions the designer can con- sider the trade-offs between speed and area to generate a fully customized cell which meets their specific device requirements. These megafunction generators are comple- mented by a group of embedded megacells. ISB35000 SERIES 7/15 |
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