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HCC40104B Datasheet(PDF) 1 Page - STMicroelectronics |
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HCC40104B Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 12 page HCC/HCF40104B HCC/HCF40194B 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER DESCRIPTION . MEDIUM-SPEED OPERATION : fCL = 9MHz (typ.) @ VDD = 10V . FULLY STATIC OPERATION . SYNCHRONOUS PARALLEL OR SERIAL OPERATION . THREE-STATE OUTPUTS (HCC/HCF40104B) . ASYNCHRONOUS MASTER RESET (HCC/HCF40194B) . STANDARDIZED, SYMMETRICAL OUTPUT CHARACTERISTICS . QUIESCENT CURRENT AT 20V FOR HCC DE- VICE . 5V, 10V, AND 15V PARAMETRIC RATINGS . INPUT CURRENT OF 100nA AT 18V AND 25 °C FOR HCC DEVICE . 100% TESTED FOR QUIESCENT CURRENT . MEETS ALL REQUIREMENTS OF JEDEC TEN- TATIVE STANDARD N °13A, ”STANDARD SPE- CIFICATIONS FOR DESCRIPTION OF ”B” SERIES CMOS DEVICES” June 1989 The HCC40104B, HCC40194B, (extended tem- perature range) and the HCC40104B, HCF40194B (intermediate temperature range) are monolithic in- tegrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro pack- age. The HCC/HCF 40104B is a universal shift reg- ister featuring parallel inputs, parallel outputs, SHIFT RIGHT and SHIFT LEFT serial inputs, and a high-im- pedance third output state allowing the device to be used in bus-organized systems. In the parallel-load mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the CLOCK input. During loading, serial data flow is inhibited. Shift-right and shift-left are accomplished synchronously on the positive clock edge with serial data entered at the SHIFT RIGHT and SHIFT LEFT serial inputs, re- spectively. Clearing the register is accomplished by setting both mode controls low and clocking the reg- ister. When the output enable input is low, all outputs assume the high impedance state. The HCC/HCF40194B is a universal shift register featur- ing parallel inputs, parallel outputs SHIFT RIGHT and SHIFT LEFT serial inputs, and a direct overriding clear input. In the parallel-load mode (S0 and S1 are high), data is loaded into the associated flip-flop and EY (Plastic Package) F (Ceramic Package) C1 (Plastic Chip Carrier ) ORDER CODES : HCC401XXBF HCF401XXBEY HCF401XXBC1 PIN CONNECTIONS 40104B 40194B 1/12 |
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