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S-8242BAW-I8T1G Datasheet(PDF) 8 Page - Seiko Instruments Inc |
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S-8242BAW-I8T1G Datasheet(HTML) 8 Page - Seiko Instruments Inc |
8 / 30 page BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Rev.1.4_00 Seiko Instruments Inc. 8 5. Operating Current Consumption, VC Pin Current, Power-down Current Consumption (Test Condition 5, Test Circuit 3) The operating current consumption (IOPE) is the current ISS that flows through the VSS pin and the VC pin current (IVC) is the current IC that flows through the VC pin under the set conditions of V1 = V2 = 3.5 V and S1:OFF, S2:ON (normal status). The power-down current consumption (IPDN) is the current ISS that flows through the VSS pin under the set conditions of V1 = V2 = 1.5 V and S1:ON, S2:OFF (overdischarge status). 6. Resistance between VM and VDD, Resistance between VM and VSS (Test Condition 6, Test Circuit 3) The resistance between VM and VDD (RVMD) is the resistance between VM and VDD pins under the set conditions of V1 = V2 = 1.5 V and S1:OFF, S2:ON. The resistance between VM and VSS (RVMS) is the resistance between VM and VSS pins under the set conditions of V1 = V2 = 3.5 V and S1:ON, S2:OFF. 7. CO Pin H Resistance, CO Pin L Resistance (Test Condition 7, Test Circuit 4) The CO pin H resistance (RCOH) is the resistance at the CO pin under the set conditions of V1 = V2 = 3.5 V, V4 = 6.5 V. The CO pin L resistance (RCOL) is the resistance at the CO pin under the set conditions of V1 = V2 = 4.5 V, V4 = 0.5 V. 8. DO Pin H Resistance, DO Pin L Resistance (Test Condition 8, Test Circuit 4) The DO pin H resistance (RDOH) is the resistance at the DO pin under the set conditions of V1 = V2 = 3.5 V, V5 = 6.5 V. The DO pin L resistance (RDOL) is the resistance at the DO pin under the set conditions of V1 = V2 = 1.8 V, V5 = 0.5 V. 9. Overcharge Detection Delay Time, Overdischarge Detection Delay Time (Test Condition 9, Test Circuit 2) The overcharge detection delay time (tCU) is the time needed for VCO to change from “H” to “L” just after the voltage V1 momentarily increases within 10 µs from overcharge detection voltage 1 (VCU1) − 0.2 V to overcharge detection voltage 1 (VCU1) + 0.2 V under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V. The overdischarge detection delay time (tDL) is the time needed for VDO to change from “H” to “L” just after the voltage V1 momentarily decreases within 10 µs from overdischarge detection voltage 1 (VDL1) + 0.2 V to overdischarge detection voltage 1 (VDL1) − 0.2 V under the set condition of V1 = V2 = 3.5 V, V3 = 0 V. 10. Overcurrent Detection Delay Time 1, Overcurrent Detection Delay Time 2 (Test Condition 10, Test Circuit 2) Overcurrent detection delay time 1 (tIOV1) is the time needed for VDO to go to “L” after the voltage V3 momentarily increases within 10 µs from 0 V to VIOV1 + 0.1 V under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V. Overcurrent detection delay time 2 (tIOV2) is the time needed for VDO to go to “L” after the voltage V3 momentarily increases within 10 µs from 0 V to 2.0 V under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V. 11. 0 V Charge Starting Charger Voltage (Products in Which 0 V Charge Is Available) (Test Condition 11, Test Circuit 2) The 0 V charge starting charger voltage (V0CHA) is defined as the voltage between the VDD pin and VM pin at which VCO goes to “H” (VVM + 0.1 V or higher) when the voltage V3 is gradually decreased from the starting condition of V1 = V2 = V3 = 0 V. |
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