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S-8253AAB-T8T1GZ Datasheet(PDF) 5 Page - Seiko Instruments Inc |
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S-8253AAB-T8T1GZ Datasheet(HTML) 5 Page - Seiko Instruments Inc |
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5 / 32 page  BATTERY PROTECTION IC FOR 2-SERIAL OR 3-SERIAL-CELL PACK Rev.3.7_00 S-8253A/B Series Seiko Instruments Inc. 5 Pin Configuration Table 3 S-8253A Series Pin No. Symbol Description 1 DOP Connection pin for discharge control FET gate (CMOS output) DOP COP VMP CTL VDD VC1 VC2 VSS 8-Pin TSSOP Top view 1 2 3 4 8 7 6 5 2 COP Connection pin for charge control FET gate (Nch open-drain output) Figure 3 3 VMP Pin for voltage detection between VDD and VMP (Detection pin for overcurrent) 4 CTL Input pin for charge / discharge control signal, Pin for shortening test time ( L : Normal operation, H : inhibit charge / discharge M (VDD × 1 / 2) : shorten test time) 5 VSS Input pin for negative power supply, Connection pin for negative voltage of battery 2 6 VC2 No connection *1 7 VC1 Connection pin for negative voltage of battery 1, for positive voltage of battery 2 8 VDD Input pin for positive power supply, Connection pin for positive voltage of battery 1 *1. No connection is electrically open. This pin can be connected to VDD or VSS. Remark Refer to the package drawings for the external views. Table 4 S-8253B Series Pin No. Symbol Description 1 DOP Connection pin for discharge control FET gate (CMOS output) 2 COP Connection pin for charge control FET gate (Nch open-drain output) 3 VMP Pin for voltage detection between VDD and VMP (Detection pin for overcurrent) 4 CTL Input pin for charge / discharge control signal, pin for shortening test time ( L : Normal operation, H : inhibit charge / discharge, M (VDD × 1 / 2) : shorten test time) 5 VSS Input pin for negative power supply, Connection pin for negative voltage of battery 3 6 VC2 Connection pin for negative voltage of battery 2, for positive voltage of battery 3 7 VC1 Connection pin for negative voltage of battery 1, for positive voltage of battery 2 8 VDD Input pin for positive power supply, Connection pin for positive voltage of battery 1 Remark Refer to the package drawings for the external views. |
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