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S-8233BBFT-TB-G Datasheet(PDF) 4 Page - Seiko Instruments Inc |
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S-8233BBFT-TB-G Datasheet(HTML) 4 Page - Seiko Instruments Inc |
4 / 26 page BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK S-8233B Series Rev.4.2_00 Seiko Instruments Inc. 4 Pin Configurations Table 2 Pin No. Symbol Description 1 DOP Connects FET gate for discharge control (CMOS output) 2 NC Non connect *1 3 COP Connects FET gate for charge control (Nch open-drain output) 4 VMP Detects voltage between VCC to VMP(Over current detection pin) 5 COVT Connects capacitor for over current detection1delay circuit 6 CDT Connects capacitor for over discharge detection delay circuit 7 CCT Connects capacitor for over charge detection delay circuit 8 VSS Negative power input, and connects negative voltage for battery 3 9 CTL Charge/discharge control signal input 10 CD3 Battery 3 conditioning signal output 11 VC2 Connects battery 2 negative voltage and battery 3 positive voltage 12 CD2 Battery 2 conditioning signal output 13 VC1 Connects battery 1 negative voltage and battery 2 positive voltage 14 CD1 Battery 1 conditioning signal output 15 NC Non connect *1 16 VCC Positive power input and connects battery 1 positive voltage *1. The NC pin is electrically open. The NC pin can be connected to VCC or VSS. VSS VMP VCC CTL 14 13 12 11 10 9 7 6 5 4 3 2 1 DOP COP CCT COVT CDT VC1 VC2 CD1 CD3 CD2 16-Pin TSSOP Top view 8 15 16 NC NC Figure 2 |
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