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S-818A53AUC-BHHT2G Datasheet(PDF) 10 Page - Seiko Instruments Inc |
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S-818A53AUC-BHHT2G Datasheet(HTML) 10 Page - Seiko Instruments Inc |
10 / 32 page LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series Rev.2.1_00 Seiko Instruments Inc. 10 Application Conditions Input capacitor (CIN): 0.47 µF or more Output capacitor (CL): 2 µF or more Equivalent series resistor (ESR): 10 Ω or less Input series resistor (RIN) 10 Ω or less Caution A general series regulator may oscillate, depending on the external components selected. Check that no oscillation occurs with the application using the above capacitor. Standard Circuit VSS VOUT VIN CIN *1 CL *2 INPUT OUTPUT GND Single GND *1. CIN is a capacitor used to stabilize input. Use a capacitor of 0.47 µF or more *2. In addition to a tantalum capacitor, a ceramic capacitor of 2.0 µF or more can be used for CL. Figure 10 Caution The above connection diagram and constant will not guarantee successful operation. Perform through evaluation using the actual application to set the constant. Technical Terms 1. Low dropout voltage regulator The low dropout voltage regulator is a voltage regulator having a low dropout voltage characteristic due to the internal low on-resistance transistor. 2. Output voltage (VOUT) The accuracy of the output voltage is ensured at ±2.0 % under the specified conditions of input voltage, output current, and temperature, which differ product by product. Caution When the above conditions are changed, the output voltage may vary and go out of the accuracy range of the output voltage. Refer to the “ Electrical Characteristics” and “ Characteristics” for details. 3. Line regulation 1 ( ∆VOUT1) and Line regulation 2 (∆VOUT2) Line regulation indicates the input voltage dependence of the output voltage. The value shows how much the output voltage changes due to the change of the input voltage when the output current is kept constant. |
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