LOW DROPOUT CMOS VOLTAGE REGULATOR

S-814 Series

Seiko Instruments Inc.

10

Standard Circuit

VSS

VOUT

VIN

*1

*2

INPUT

OUTPUT

GND

Single GND

*2. In addition to a tantalum capacitor, a ceramic capacitor of 0.47

μF or more can be used in C

Figure 10

Caution The above connection diagram and constant will not guarantees successful operation.

Perform through evaluation using the actual application to set the constant.

Technical Terms

1. Low dropout voltage regulator

The low dropout voltage regulator is a voltage regulator featuring a low dropout voltage characteristic due

to its internal low ON-resistance characteristic transistors.

2. Low ESR

used in the S-814 Series.

The accuracy of the output voltage is ensured at

output current, and temperature, which differ depending upon the product items.

*1. The condition differs depending upon each product.

Caution If you change the above conditions, the output voltage value may vary out of the

accuracy range of the output voltage. Refer to the “

Electrical Characteristics” and “

Characteristics” for details.

4. Line regulation 1 (

ΔV

Indicate the input voltage dependencies of output voltage. That is, the value shows how much the output

voltage changes due to a change in the input voltage with the output current remained unchanged.

5. Load regulation (

ΔV

Indicates the output current dependencies of output voltage. That is, the value shows how much the

output voltage changes due to a change in the output current with the input voltage remained unchanged.