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P89V660 Datasheet(PDF) 7 Page - NXP Semiconductors |
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P89V660 Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 89 page P89V660_662_664_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 29 January 2008 7 of 89 NXP Semiconductors P89V660/662/664 80C51 with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI P1[4]/CEX1 44 6 I/O P1[4] — Port 1 bit 4. I/O CEX1 — Capture/compare external I/O for PCA Module 1 P1[5]/CEX2 1 7 I/O P1[5] — Port 1 bit 5. I/O CEX2 — Capture/compare external I/O for PCA Module 2 P1[6]/SCL 2 8 I/O P1[6] — Port 1 bit 6. I/O SCL — I2C-bus serial clock input/output P1[7]/SDA 3 9 I/O P1[7] — Port 1 bit 7. I/O SDA — I2C-bus serial data input/output P2[0] to P2[7] I/O with internal pull-up Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins are pulled HIGH by the internal pull-ups when ‘1’s are written to them and can be used as inputs in this state. As inputs, Port 2 pins that are externally pulled LOW will source current (IIL) because of the internal pull-ups. Port 2 sends the high-order address byte during fetches from external program memory and during accesses to external Data Memory that use 16-bit address (MOVX@DPTR). In this application, it uses strong internal pull-ups when making the transition to ‘1’s. P2[0]/A8 18 24 I/O P2[0] — Port 2 bit 0. O A8 — Address bit 8. P2[1]/A9 19 25 I/O P2[1] — Port 2 bit 1. O A9 — Address bit 9. P2[2]/A10 20 26 I/O P2[2] — Port 2 bit 2. O A10 — Address bit 10. P2[3]/A11 21 27 I/O P2[3] — Port 2 bit 3. O A11 — Address bit 11. P2[4]/A12 22 28 I/O P2[4] — Port 2 bit 4. O A12 — Address bit 12. P2[5]/A13 23 29 I/O P2[5] — Port 2 bit 5. O A13 — Address bit 13. P2[6]/A14 24 30 I/O P2[6] — Port 2 bit 6. O A14 — Address bit 14. P2[7]/A15 25 31 I/O P2[7] — Port 2 bit 7. O A15 — Address bit 15. P3[0] to P3[7] I/O with internal pull-up Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins are pulled HIGH by the internal pull-ups when ‘1’s are written to them and can be used as inputs in this state. As inputs, Port 3 pins that are externally pulled LOW will source current (IIL) because of the internal pull-ups. P3[0]/RXD 5 11 I P3[0] — Port 3 bit 0. I RXD — Serial input port. P3[1]/TXD 7 13 O P3[1] — Port 3 bit 1. O TXD — Serial output port. Table 3. Pin description …continued Symbol Pin Type Description TQFP44 PLCC44 |
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