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74AHC00PW Datasheet(PDF) 1 Page - NXP Semiconductors |
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74AHC00PW Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 13 page 1. General description The 74AHC00; 74AHCT00 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74AHC00; 74AHCT00 provides the quad 2-input NAND function. 2. Features s Balanced propagation delays s All inputs have a Schmitt-trigger action s Inputs accepts voltages higher than VCC s For 74AHC00 only: operates with CMOS input levels s For 74AHCT00 only: operates with TTL input levels s ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101C exceeds 1000 V s Multiple package options s Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information 74AHC00; 74AHCT00 Quad 2-input NAND gate Rev. 03 — 8 January 2008 Product data sheet Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC00D −40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74AHCT00D 74AHC00PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74AHCT00PW 74AHC00BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm SOT762-1 74AHCT00BQ |
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