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TPS40180 Datasheet(PDF) 19 Page - Texas Instruments |
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TPS40180 Datasheet(HTML) 19 Page - Texas Instruments |
19 / 52 page ![]() www.ti.com = + ´ ´ e pk L COMP V (I R ) 12.5 (8) ( ) f IN OUT OUT RIPPLE IN SW V V V 1 I L V æ ö - æ ö æ ö = ´ ´ ç ÷ ç ÷ ç ÷ ç ÷ è ø è ø è ø (9) æ ö = + ç ÷ è ø RIPPLE PK OUT I I I 2 (10) = ´ + OUT RMP VSH IN V Ve V V V (11) æ ö = ´ + + ´ ´ ç ÷ è ø OUT RMP VSH PK L IN V COMP V V (I R ) 12.5 V (12) æ ö a = ç ÷ è ø RMP IN V V (13) ( ) æ ö ç ÷ b = ´ ´ + ç ÷ ´ è ø RMP L PK ph V R 12.5 I 2 N (14) ( ) VSH ILIM V R1 1 I b + a ´ = - a ´ (15) TPS40180 SLVS753B – FEBRUARY 2007 – REVISED NOVEMBER 2007 Overcurrent protection for the TPS40180 is set by connecting a resistor from the ILIM pin to the VSH pin. A current source of 23.5 µA out of the ILIM pin sets a voltage level on the ILIM pin and the COMP pin is not allowed to rise above this level. Since the device uses current mode control and COMP cannot rise above this level, an effective maximum output current is defined. The second resistor on the ILIM pin, R2, is optional and if used is connected to the output voltage. This resistor provides compensation of the overcurrent level for changes in output voltage, such as would be seen at startup. If not used, the overcurrent threshold level is higher at output voltages lower than the designed target. The output current, flows through the inductor resistance and develops a voltage, VC across it, representative of the output current. This resistance voltage is extracted from the total inductor voltage by the R-C network placed across the inductor. This voltage is amplified with a gain of 12.5 and then subtracted from the error amplifier output, COMP, to generate the Ve voltage. The Ve signal is compared to the slope-compensation RAMP signal to generate the PWM signal that is used to control the FET drivers. As the output current is increased, the amplified VC causes the Ve signal to decrease. In order to maintain the proper duty cycle, the COMP signal must increase. Therefore, the magnitude of the COMP signal contains the output current information as shown in Equation 8 through Equation 10: In order to satisfy the input-output voltage relationship, the Equation 11 must hold: Combining Equation 8 and Equation 11 and solving for the COMP voltage gives: Since COMP and ILIM are of equal voltage when at the current limit condition, setting ILIM to the expected COMP voltage at maximum current is how the current limit threshold is set. To calculate the resistors R1 and R2 from Figure 25, proceed as follows: Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Link(s): TPS40180 |
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