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SST29VE010A-250-4C-WH Datasheet(PDF) 4 Page - Silicon Storage Technology, Inc |
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SST29VE010A-250-4C-WH Datasheet(HTML) 4 Page - Silicon Storage Technology, Inc |
4 / 26 page 4 © 1999 Silicon Storage Technology, Inc. 303-01 2/99 1 Megabit Page Mode EEPROM SST29EE010A / SST29LE010A / SST29VE010A FUNCTIONAL BLOCK DIAGRAM OF SST 29EE010A/29LE010A/29VE010A 303 PGM T1.1 TABLE 1: PRODUCT IDENTIFICATION TABLE Byte Data Manufacturer’s Code 0000 H BF H SST29EE010A Device Code 0001 H 22 H SST29LE010A Device Code 0001 H 23 H SST29VE010A Device Code 0001 H 23 H Product Identification The product identification mode identifies the device as the SST29EE010A/29LE010A/29VE010A and manu- facturer as SST. This mode may be accessed by hard- ware or software operations. The hardware operation is typically used by a programmer to identify the correct algorithm for the SST29EE010A/29LE010A/29VE010A. Users may wish to use the software product identification operation to identify the part (i.e. using the device code) when using multiple manufacturers in the same socket. For details, see Table 3 for hardware operation or Table 4 for software operation, Figure 9 for the software ID entry and read timing diagram and Figure 16 for the ID entry command sequence flowchart. The manufacturer and device codes are the same for both operations. Product Identification Mode Exit In order to return to the standard read mode, the Soft- ware Product Identification mode must be exited. Exiting is accomplished by issuing the Software ID Exit (reset) operation, which returns the device to the read operation. The Reset operation may also be used to reset the device to the read mode after an inadvertent transient condition that apparently causes the device to behave abnormally, e.g. not read correctly. See Table 4 for software command codes, Figure 10 for timing wave- form and Figure 16 for a flowchart. Y-Decoder and Page Latches I/O Buffers and Data Latches 303 ILL B1.0 Address Buffer & Latches X-Decoder DQ7 - DQ0 A16 - A0 WE# OE# CE# 1,048,576 Bit EEPROM Cell Array Control Logic |
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