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STW4810CHDRLF Datasheet(PDF) 10 Page - STMicroelectronics |
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STW4810CHDRLF Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 78 page  Ball information STw4810 10/78 Table 2. STw4810 balls function Ball Ball name Ball type Description General supplies D1 VBAT_DIG VDDD-VBAT Battery supply for digital/oscillator C3 VMINUS_DIG VSSD Ground for digital and oscillator C6 VBAT_ANA VDDA-VBAT Battery supply for analog B5 VMINUS_ANA VSSA Ground for analog F9 VBAT_USB VDDA-VBAT Battery supply for USB block J9 VMINUS_USB VSSA Ground for USB block A9 VREF_18 Int-Ref Internal reference Control balls C8 PON DI(VBAT) Pull Down 1.5M Ω Power-on and reset K4 SW_RESETn DI(VIO_VMEM) Pull Up 1.5M Ω Software reset, reset all applications when SW_RESETn = 0 J2 VDDOK DO(VIO_VMEM) Supply monitoring for multimedia processors. Interruption for high temperature warning J3 PORn DO(VIO_VMEM) Multimedia processor Resetn H6 PWREN DI(VIO_VMEM) Pull Up 1.5M Ω Sleep mode from multimedia processor C1 TCXO_EN DI(VIO_VMEM) Pull Down 1.5M Ω Request of master clock from modem part B2 REQUEST_MC DO(VIO_VMEM) Request to master clock oscillator J6 SCL DI(VIO_VMEM) Clock for Main I2C interface H7 SDA DIO(VIO_VMEM) SDA for Main I2C interface D2 MASTER_CLK AI Pull Down 1.5M Ω 26 MHz, 13 MHz or 19.2 MHz from modem A1 CLK32K_IN DI(VIO_VMEM) Pull Down 1.5M Ω 32 kHz input K3 CLK32K DO(VIO_VMEM) 32 kHz to multimedia processor |
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