ADS62P43RGC datasheet(8/67 Pages) TI

Part #	ADS62P43RGC

Description	Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs

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Manufacturer	TI [Texas Instruments]

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8 / 67 page

ADS62P45, ADS62P44

ADS62P43, ADS62P42

REV1P0 SEP 2007

8

www.ti.com

PRODUCT PREVIEW information concerns products in

the formative or design phase of development.

Characteristic data and other specifications are design

goals. Texas Instruments reserves the right to change or

discontinue these products without notice.

ELECTRICAL CHARACTERISTICS

Typical values at 25C, min & max values are across the full temperature range TMIN = -40C to TMAX = 85C, AVDD = 3.3V, DRVDD = 3.3V, 50%

clock duty cycle, -1dBFS differential analog input, internal reference, applies to CMOS & LVDS interfaces, unless otherwise noted.

ADS62P45

125 MSPS

ADS62P44

105 MSPS

ADS62P43

80 MSPS

ADS62P42

65 MSPS

PARAMETERS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

Dynamic Characteristics

Fin= 10MHz

74.3

74.4

74.5

Fin = 50MHz

TBD

73.8

TBD

74.1

74.2

Fin = 70MHz

73.6

TBD

73.6

74

TBD

74.1

0 dB gain

71.8

72.5

Fin =

170MHz

3.5 dB gain

71

71.4

0 dB gain

71

72

SNR

Signal to

noise ratio,

CMOS

Fin =

230MHz

3.5 dB gain

70

71

dBFS

Fin= 10MHz

74.5

74.6

74.7

Fin = 50MHz

TBD

74

TBD

74.3

74.4

Fin = 70MHz

73.8

TBD

73.8

74.2

TBD

74.3

0 dB gain

72.1

72.7

Fin =

170MHz

3.5 dB gain

71

71.8

0 dB gain

71.2

71

72.2

SNR

Signal to

noise ratio,

LVDS

Fin =

230MHz

3.5 dB gain

70.1

71.2

dBFS

RMS output

noise

Inputs tied to common-

mode

0.96

LSB

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