7 / 48 page
IP1001 LF
Data Sheet
7/48
Dec. 18, 2007
Copyright © 2006, IC Plus Corp.
IP1001-DS-R06
Pin description (continued)
Pin no.
Label
Type
Description
MAC Interface
GMII
RGMII
MII
57
GTX_CLK TXC
--
I
GMII/RGMII Transmit Clock
I/F
MDI
speed
Description
Gigabit 125Mhz input.
IP1001 utilizes this clock to
sample TXD[7:0], TX_ER and
TX_EN at the rising edge.
GMII
Mode
10/100M
bps
Not used.
Gigabit 125Mhz input.
IP1001 utilizes this clock to
sample TXD[3:0] and
TX_CTL at both the rising
edge and falling edge of
GTX_CLK.
100Mbps 25Mhz input.
IP1001 utilizes this clock to
sample TXD[3:0] and
TX_CTL at both the rising
edge and falling edge.
RGMII
Mode
10Mbps 2.5Mhz input.
IP1001 utilizes this clock to
sample TXD[3:0] and
TX_CTL at both the rising
edge and falling edge.
55
--
--
TX_CLK O
MII Transmit Clock
I/F
MDI
speed
Description
Gigabit Not used.
100Mbps 25Mhz output.
IP1001 uses the clock to
sample TX_EN, TX_ER, and
TXD[3:0].
GMII
Mode
10Mbps 2.5Mhz output.
IP1001 uses the clock to
sample TX_EN, TX_ER, and
TXD[3:0].
Gigabit
100Mbps
RGMII
Mode
10Mbps
Not used.
This pin should be left open
for normal operation.
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
