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74VHC373 Datasheet(PDF) 4 Page - STMicroelectronics

Part No. 74VHC373
Description  OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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74VHC373 Datasheet(HTML) 4 Page - STMicroelectronics

 
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CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
T est Cond ition s
Val ue
Un it
TA =25
oC
-40 to 85
oC
Min.
Typ .
Max.
Min .
Max.
CIN
Input Capacitance
4
10
10
pF
COUT
Output Capacitance
6
pF
CPD
Power Dissipation
Capacitance (note 1)
27
pF
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD
• VCC • fIN +ICC/8 (per Latch)
AC ELECTRICAL CHARACTERISTICS (Input tr =tf =3 ns)
Symb ol
Parameter
Test Co nditi on
Val ue
Un it
VCC
(V)
CL
(pF )
TA =25
oC
-40 to 85
oC
Min.
Typ .
Max.
Min .
Max.
tPLH
tPHL
Propagation Delay
Time
LE to Q
3.3
(*)
15
7.0
11.0
1.0
13.0
ns
3.3
(*)
50
9.5
14.5
1.0
16.5
5.0
(**)
15
4.9
7.2
1.0
8.5
5.0
(**)
50
6.4
9.2
1.0
10.5
tPLH
tPHL
Propagation Delay
Time
Dto Q
3.3
(*)
15
7.3
11.4
1.0
13.5
ns
3.3
(*)
50
9.8
14.9
1.0
17.0
5.0
(**)
15
5.0
7.2
1.0
8.5
5.0
(**)
50
6.5
9.2
1.0
10.5
tPZL
tPZH
Output EnableTime
3.3
(*)
15
RL =1K
7.3
11.4
1.0
13.5
ns
3.3
(*)
50
RL =1K
9.8
14.9
1.0
17.0
5.0
(**)
15
RL =1K
5.5
8.1
1.0
9.5
5.0
(**)
50
RL =1K
7.0
10.1
1.0
11.5
tPLZ
tPHZ
Output Disable Time
3.3
(*)
50
RL =1K
9.5
13.2
1.0
15.0
ns
5.0
(**)
50
RL =1K
6.5
9.2
1.0
10.5
tw
Pulse Width (LE)
HIGH
3.3
(*)
5.0
5.0
ns
5.0
(**)
5.0
5.0
ts
Setup Time D to LE
HIGH or LOW
3.3
(*)
4.0
4.0
ns
5.0
(**)
4.0
4.0
th
Hold Time D toLE
HIGH or LOW
3.3
(*)
1.0
1.0
ns
5.0
(**)
1.0
1.0
tOSLH
tOSHL
Output to Output Skew
Time (note 1)
3.3
(*)
50
1.5
1.5
ns
5.0
(**)
50
1.0
1.0
(*) Voltage range is 3.3V
± 0.3V
(**) Voltage range is 5V
± 0.5V
Note 1: Parameter guaranteed by design. tsoLH =|tpLHm-tpLHn|, tsoHL =|tpHLm -tpHLn|
74VHC373
4/10


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