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X76F102M8I Datasheet(PDF) 7 Page - IC MICROSYSTEMS

Part # X76F102M8I
Description  Secure SerialFlash
Download  18 Pages
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Manufacturer  ICMIC [IC MICROSYSTEMS]
Direct Link  http://www.icmic.com
Logo ICMIC - IC MICROSYSTEMS

X76F102M8I Datasheet(HTML) 7 Page - IC MICROSYSTEMS

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X76F102
7
PASSWORDS
Passwords are changed by sending the "change read
password" or "change write password" commands in a
normal sector write operation. A full eight bytes contain-
ing the new password must be sent, following successful
transmission of the current write password and a valid
password ACK response. The user can use a repeated
ACK Polling command to check that a new password has
been written correctly. An ACK indicates that the new
password is valid.
There is no way to read any of the passwords.
RESPONSE TO RESET (DEFAULT = 19 02 AA 55)
The ISO Response to reset is controlled by the RST and
CLK pins. When RST is pulsed high during a clock pulse,
the device will output 32 bits of data, one bit per clock,
and it resets to the standy state. This conforms to the ISO
standard for “synchronous response to reset”. The part
must not be in a write cycle for the response to reset to
occur.
After initiating a nonvolatile write cycle the RST pin must
not be pulsed until the nonvolatile write cycle is complete.
If not, the ISO response will not be activated. If the RST
is pulsed HIGH and the CLK is within the RST pulse
(meet the tNOL spec.) in the middle of an ISO transaction,
it will output the 32 bit sequence again (starting at bit 0).
Otherwise, this aborts the ISO operation and the part
returns to standby state. If the RST is pulsed HIGH and
the CLK is outside the RST pulse (in the middle of an
ISO transaction), this aborts the ISO operation and the
part returns to standby state.
If there is power interrupted during the Response to
Reset, the response to reset will be aborted and the part
will return to the standby state. A Response to Reset is
not available during a nonvolatile write cycle.
Figure 7. Response to RESET (RST)
SCK
SO
RST
Byte
0
MSB
LSB
LSB
MSB
1
LSB
MSB
LSB
MSB
2
3
1 0 0
0 0
1 1
1
0
0
0
1 0 0 0 0
0
0
0
0
1
1 0
1
1
1
0
0
0
1
1
0
ABSOLUTE MAXIMUM RATINGS*
Temperature under Bias ..................... –65°C to +135°C
Storage Temperature ..........................–65°C to +150°C
Voltage on any Pin with
Respect to VSS .......................................–1V to +7V
D.C. Output Current..................................................5mA
Lead Temperature
(Soldering, 10 seconds).................................. 300°C
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and the functional operation of
the device at these or any other conditions above those
listed in the operational sections of this specification is
not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.


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