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X25057 Datasheet(PDF) 1 Page - IC MICROSYSTEMS

Part No. X25057
Description  5MHz Low Power SPI Serial E2PROM with IDLock™ Memory
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Maker  ICMIC [IC MICROSYSTEMS]
Homepage  http://www.icmic.com
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X25057 Datasheet(HTML) 1 Page - IC MICROSYSTEMS

 
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©
Xicor, Inc. 1994 – 1997 Patents
Pending 7033-1.1 5/8/97 T1/C0/D0 SH
1
Characteristics subject to change without notice
4K
X25057
512 x 8 Bit
5MHz Low Power SPI Serial E
2PROM with IDLock™ Memory
FEATURES
•5MHz Clock Rate
•IDLock™ Memory
—IDLock First or Last Page, Any 1/4 or Lower 1/2 of
E
2PROM Array
•Low Power CMOS
—<1∝A Standby Current
—<3mA Active Current during Write —
<400∝A Active Current during Read
•1.8V to 3.6V, 2.7V-5.5V or 4.5V to 5.5V Operation
•Built-in Inadvertent Write Protection
—Power-Up/Power-Down Protection Circuitry —
Write Enable Latch
—Write Protect Pin
•SPI Modes (0,0 & 1,1)
•512 x 8 Bits
—16 Byte Page Mode
•Self-Timed Write Cycle
—5ms Write Cycle Time (Typical)
•High Reliability
—Endurance: 100,000 Cycles/Byte
—Data Retention: 100 Years
—ESD: 2000V on all pins
•8-Lead MSOP Package •8-
Lead TSSOP Package
•8-Lead SOIC Package
•8-Lead PDIP Package
DESCRIPTION
The X25057 is a CMOS 4K-bit serial E
2PROM, internally
organized as 512 x 8. The X25057 features a Serial
Peripheral Interface (SPI) and software protocol allowing
operation on a simple four-wire bus. The bus
signals are a clock input (SCK) plus separate data in (SI)
and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing any
number of devices to share the same bus.
IDLock is a programmable locking mechanism which
allows the user to lock system ID and parametric data in
different portions of the E
2PROM memory space, ranging
from as little as one page to as much as 1/2 of
the total array. The X25057 also features a WP pin that can
be used for hardwire protection of the part, disabling
all write attempts, as well as a Write Enable Latch that
must be set before a write operation can be initiated.
The X25057 utilizes Xicor’s proprietary Direct Write
TM cell,
providing a minimum endurance of 100,000 cycles
per byte and a minimum data retention of 100 years.
FUNCTIONAL DIAGRAM
COMMAND
DECODE
AND
CONTROL
LOGIC
WRITE CONTROL LOGIC
DATA REGISTER
Y DECODE LOGIC
X
DECODE
LOGIC
HIGH VOLTAGE
CONTROL
4K E
2
PROM
ARRAY
(512 x 8)
SO
SI
SCK
CS
WP
8
16
32
7033 FRM F01
This X25057 device has been acquired by
IC MICROSYSTEMS from Xicor, Inc.
ICmic
IC MICROSYSTEMS
TM


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