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TLP115 Datasheet(PDF) 4 Page - Toshiba Semiconductor |
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TLP115 Datasheet(HTML) 4 Page - Toshiba Semiconductor |
4 / 8 page TLP115 2007-10-01 4 Switching Characteristics(VCC = 5V, Ta = 25°C) Characteristic Symbol Test Cir − cuit Test Condition Min. Typ. Max. Unit Propagation delay time (H→L) tpHL 1 IF=0→ 16mA CL=15pF, RL=350Ω ― 60 120 ns Propagation delay time (L→H) tpLH 1 IF=16→ 0mA CL=15pF, RL=350Ω ― 60 120 ns Output rise fall time (10 −90%) tr, tf 2 RL=350Ω, CL=15pF IF=0 16mA ― 30 ― ns Common mode transient immunity at high output level CMH 2 IF=0mA, VCM=400Vp−p VO(min)=2V, RL=350Ω 1000 ― ― V / μs Common mode transient immunity at low output level CML 2 IF=16mA, VCM=400Vp−p VO(max)=0.8V, RL=350Ω −1000 ― ― V / μs (Note 4) Device considered a two −terminal device: Pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together. (Note 5) The VCC supply voltage to each TLP115 isolator must be bypassed by 0.1μF capacitor. This can be either a ceramic or solid tantalum capacitor with good high frequency characterstic and should be connected as close as possible to package VCC and GND pins of each device. (Note 6) Maximum electrostatic discharge voltage for any pins: 180V(C=200pF, R=0) |
Similar Part No. - TLP115_07 |
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Similar Description - TLP115_07 |
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