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ACS8520A Datasheet(PDF) 48 Page - Semtech Corporation |
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ACS8520A Datasheet(HTML) 48 Page - Semtech Corporation |
48 / 150 page ACS8520A SETS ADVANCED COMMS & SENSING FINAL DATASHEET Revision 1.00/September 2007© Semtech Corp. Page 48 www.semtech.com Multiplexed Mode In Multiplexed Mode, the device is configured to interface with microprocessors (e.g., Intel's 80x86 family) which share bus signals between address and data. Figures 17 and 18 show the timing diagrams of read and write accesses. Figure 17 Read Access Timing in MULTIPLEXED Mode Table 25 Read Access Timing in MULTIPLEXED Mode (for use with Figure 17) Symbol Parameter MIN TYP MAX tsu1 Setup AD address valid to ALEfalling edge 5 ns - - tsu2 Setup CSBfalling edge to RDBfalling edge 0 ns - - td1 Delay RDBfalling edge to AD data valid (consecutive Read - Read) 12 ns - 40 ns Delay RDBfalling edge to AD data valid (consecutive Write - Read) 17 ns - 193 ns td2 Delay CSBfalling edge to RDY active - - 13 ns td3 Delay RDBfalling edge to RDYfalling edge - - 15 ns td4 Delay RDBrising edge to AD data high-Z - - 10 ns td5 Delay CSBrising edge to RDY high-Z - - 10 ns tpw1 RDB Low time (consecutive Read - Read) 35 ns 60 ns - RDB Low time (consecutive Write - Read) 35 ns 200 ns - tpw2 RDY Low time (consecutive Read - Read) 20 ns - 40 ns RDY Low time (consecutive Write - Read) 20 ns - 185 ns tpw3 ALE High time 5 ns - - th1 Hold AD address valid after ALEfalling edge 9 ns - - th2 Hold CSB Low after RDBrising edge 0 ns - - th3 Hold RDB Low after RDYrising edge 0 ns - - tp1 Time between ALEfalling edge and RDBfalling edge 0 ns - - tp2 Time between (consecutive Read - Read) accesses (RDBrising edge to ALErising edge) 20 ns - - tp2 Time between (consecutive Write - Read) accesses (RDBrising edge to ALErising edge) 160 ns - - F8110D_011ReadAccMultiplex_01 CSB ALE Z Z data address X X WRB RDB tpw1 th2 tpw3 tsu1 th1 tsu2 tp1 td3 td1 td4 tpw2 th3 AD RDY td2 td5 |
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